| Akshay Saraswat | 8e4ab1d | 2014-06-18 17:53:58 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * |
| 4 | * Configuration settings for the SAMSUNG EXYNOS5420 SoC |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_EXYNOS5420_H |
| 10 | #define __CONFIG_EXYNOS5420_H |
| 11 | |
| 12 | #define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */ |
| 13 | |
| 14 | #define MACH_TYPE_SMDK5420 8002 |
| 15 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420 |
| 16 | |
| 17 | #define CONFIG_VAR_SIZE_SPL |
| 18 | |
| 19 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 20 | #define CONFIG_SYS_TEXT_BASE 0x23E00000 |
| 21 | #ifdef CONFIG_VAR_SIZE_SPL |
| 22 | #define CONFIG_SPL_TEXT_BASE 0x02024410 |
| 23 | #else |
| 24 | #define CONFIG_SPL_TEXT_BASE 0x02024400 |
| 25 | #endif |
| 26 | #define CONFIG_IRAM_TOP 0x02074000 |
| 27 | |
| 28 | #define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420" |
| 29 | |
| 30 | #define CONFIG_MAX_I2C_NUM 11 |
| 31 | |
| 32 | /* Enable FIT support and comparison */ |
| 33 | #define CONFIG_FIT |
| 34 | #define CONFIG_FIT_BEST_MATCH |
| 35 | |
| 36 | #define CONFIG_BOARD_REV_GPIO_COUNT 2 |
| 37 | |
| 38 | #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000" |
| 39 | |
| 40 | /* |
| 41 | * Put the initial stack pointer 1KB below this to allow room for the |
| 42 | * SPL marker. This value is arbitrary, but gd_t is placed starting here. |
| 43 | */ |
| 44 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) |
| 45 | |
| 46 | #endif /* __CONFIG_EXYNOS5420_H */ |