wdenk | 2d39b71 | 2000-12-14 10:04:19 +0000 | [diff] [blame] | 1 | CPU module revisions |
| 2 | -------------------- |
| 3 | |
| 4 | My cpu module has the model number "CMA286-60-990526-01". My motherboard |
| 5 | has the model number "CMA102-32M-990526-01". These are both fairly old, |
| 6 | and may not reflect current design. In particular, I can see from the |
| 7 | Cogent web site that the CMA286 has been significantly redesigned - it |
| 8 | now has on board RAM (4M), ethernet 10baseT PHY (on SCC2), 2 serial ports |
| 9 | (SMC1 and SMC2), and 48pin DIN for the FEC (if present i.e. MPC860T), and |
| 10 | also the EPROM is 512K. |
| 11 | |
| 12 | My CMA286-60 has none of this, and only 128K EPROM. In addition, the CPU |
| 13 | clock is listed as 66MHz, whereas mine is 33.333MHz. |
| 14 | |
| 15 | Clocks |
| 16 | ------ |
| 17 | |
| 18 | Quote from my "CMA286 MPC860/821 User's Manual": |
| 19 | |
| 20 | "When setting up the Periodic Interrupt Timer (PIT), be aware that the |
| 21 | CMA286 places the MPC860/821 in PLL X1 Mode. This means that we feed |
| 22 | a 25MHz clock directly into the MPC860/821. This mode sets the divisor |
| 23 | for the PIT to be 512. In addition, the Time Base Register (TMB) |
| 24 | divisor is set to 16." |
| 25 | |
| 26 | I interpreted this information to mean that EXTCLK is 25MHz and that at |
| 27 | power on reset, MODCK1=1 and MODCK2=0, which selects EXTCLK as the |
| 28 | source for OSCCLK and PITRTCLK, sets RTDIV to 512 and sets MF (the |
| 29 | multiplication factor) to 1 (I assume this is what they mean by X1 |
| 30 | mode above). MF=1 means the cpus internal clock runs at the same |
| 31 | rate as EXTCLK i.e. 25MHz. |
| 32 | |
| 33 | Furthermore, since SCCR[TBS] (the Time Base Source selector bit in the |
| 34 | System Clock and Reset Control register) is set in the cpu initialisation |
| 35 | code, the TMBCLK source is forced to be GCLK2 and the TMBCLK prescale is |
| 36 | forced to be 16. This results in TMBCLK=1562500. |
| 37 | |
| 38 | One problem - since PITRTCLK source is EXTCLK (25Mhz) and RTDIV is 512, |
| 39 | PITRTCLK will be 48828.125 (huh?). Another quote from the MPC860 Users |
| 40 | Manual: |
| 41 | |
| 42 | "When used by the real-time clock (RTC), the PITRTCLK source is first |
| 43 | divided as determined by RTDIV, and then divided in the RTC circuits by |
| 44 | either 8192 or 9600. Therefore, in order for the RTC to count in |
| 45 | seconds, the clock source must satisfy: |
| 46 | |
| 47 | (EXTCLK or OSCM) / [(4 or 512) x (8192 or 9600)] = 1 |
| 48 | |
| 49 | The RTC will operate with other frequencies, but it will not count in |
| 50 | units of seconds." |
| 51 | |
| 52 | Therefore, the internal RTC of the MPC860 is not going to count in |
| 53 | seconds, so we must use the motherboard RTC (if we need a RTC). |
| 54 | |
| 55 | I presume this means that they do not provide a fixed oscillator for |
| 56 | OSCM. The code in get_gclk_freq() assumes PITRTCLK source is OSCM, |
| 57 | RTDIV is 4, and that OSCM/4 is 8192 (i.e. a ~32KHz oscillator). Since |
| 58 | the CMA286-60 doesn't have this (at least mine doesn't) we can't use |
| 59 | the code in get_gclk_freq(). |
| 60 | |
| 61 | Finally, it appears that the internal clock in my CMA286-60 is actually |
| 62 | 33.333MHz. Which makes TMBCLK=2083312.5 (another huh?) and |
| 63 | PITRTCLK=65103.515625 (bloody hell!). |
| 64 | |
| 65 | If anyone finds anything wrong with the stuff above, I would appreciate |
| 66 | an email about it. |
| 67 | |
| 68 | Murray Jensen <Murray.Jensen@cmst.csiro.au> |
| 69 | 21-Aug-00 |