blob: a5f24d00a69a5853be70e34be2f2df369509de40 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +09001menu "x86 architecture"
2 depends on X86
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +09005 default "x86"
6
Masahiro Yamada45ccec82014-10-24 01:30:43 +09007config USE_PRIVATE_LIBGCC
8 default y
9
Masahiro Yamadadd840582014-07-30 14:08:14 +090010choice
11 prompt "Target select"
12
13config TARGET_COREBOOT
14 bool "Support coreboot"
Simon Glass8ef07572014-11-12 22:42:07 -070015 help
16 This target is used for running U-Boot on top of Coreboot. In
17 this case Coreboot does the early inititalisation, and U-Boot
18 takes over once the RAM, video and CPU are fully running.
19 U-Boot is loaded as a fallback payload from Coreboot, in
20 Coreboot terminology. This method was used for the Chromebook
21 Pixel when launched.
22
23config TARGET_CHROMEBOOK_LINK
24 bool "Support Chromebook link"
25 help
26 This is the Chromebook Pixel released in 2013. It uses an Intel
27 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28 SDRAM. It has a Panther Point platform controller hub, PCIe
29 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30 reader, microphone and speakers, display port and 32GB SATA
31 solid state drive. There is a Chrome OS EC connected on LPC,
32 and it provides a 2560x1700 high resolution touch-enabled LCD
33 display.
Masahiro Yamadadd840582014-07-30 14:08:14 +090034
35endchoice
36
Simon Glass8ef07572014-11-12 22:42:07 -070037source "arch/x86/cpu/ivybridge/Kconfig"
38
Masahiro Yamadadd840582014-07-30 14:08:14 +090039source "board/chromebook-x86/coreboot/Kconfig"
40
Simon Glass8ef07572014-11-12 22:42:07 -070041source "board/google/chromebook_link/Kconfig"
42
Masahiro Yamadadd840582014-07-30 14:08:14 +090043endmenu