blob: ebdc5c8b0544cf1853e63b5128d2d54168b27c28 [file] [log] [blame]
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +00001/*
2 * Configuation settings for the sh7752evb board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +00007 */
8
9#ifndef __SH7752EVB_H
10#define __SH7752EVB_H
11
12#undef DEBUG
13#define CONFIG_SH 1
14#define CONFIG_SH4A 1
15#define CONFIG_SH_32BIT 1
16#define CONFIG_CPU_SH7752 1
17#define CONFIG_SH7752EVB 1
18
19#define CONFIG_SYS_TEXT_BASE 0x5ff80000
20#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
21
22#define CONFIG_CMD_MEMORY
23#define CONFIG_CMD_NET
24#define CONFIG_CMD_MII
25#define CONFIG_CMD_PING
26#define CONFIG_CMD_NFS
27#define CONFIG_CMD_DFL
28#define CONFIG_CMD_SDRAM
29#define CONFIG_CMD_SF
30#define CONFIG_CMD_RUN
31#define CONFIG_CMD_SAVEENV
32#define CONFIG_CMD_MD5SUM
33#define CONFIG_MD5
34#define CONFIG_CMD_LOADS
35#define CONFIG_CMD_MMC
36#define CONFIG_CMD_EXT2
37#define CONFIG_DOS_PARTITION
38#define CONFIG_MAC_PARTITION
39
40#define CONFIG_BAUDRATE 115200
41#define CONFIG_BOOTDELAY 3
42#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
43
44#define CONFIG_VERSION_VARIABLE
45#undef CONFIG_SHOW_BOOT_PROGRESS
46#define CONFIG_CMDLINE_EDITING
47#define CONFIG_AUTO_COMPLETE
48
49/* MEMORY */
50#define SH7752EVB_SDRAM_BASE (0x40000000)
51#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
52
53#define CONFIG_SYS_LONGHELP
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +000054#define CONFIG_SYS_CBSIZE 256
55#define CONFIG_SYS_PBSIZE 256
56#define CONFIG_SYS_MAXARGS 16
57#define CONFIG_SYS_BARGSIZE 512
58#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
59
60/* SCIF */
61#define CONFIG_SCIF_CONSOLE 1
62#define CONFIG_CONS_SCIF2 1
63#undef CONFIG_SYS_CONSOLE_INFO_QUIET
64#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
65#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
66
67#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
68#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
69 480 * 1024 * 1024)
70#undef CONFIG_SYS_ALT_MEMTEST
71#undef CONFIG_SYS_MEMTEST_SCRATCH
72#undef CONFIG_SYS_LOADS_BAUD_CHANGE
73
74#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
75#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
76#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
77 128 * 1024 * 1024)
78
79#define CONFIG_SYS_MONITOR_BASE 0x00000000
80#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
81#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
82#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
83
84/* FLASH */
85#define CONFIG_SYS_NO_FLASH
86
87/* Ether */
88#define CONFIG_SH_ETHER 1
89#define CONFIG_SH_ETHER_USE_PORT 0
90#define CONFIG_SH_ETHER_PHY_ADDR 18
91#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
92#define CONFIG_SH_ETHER_USE_GETHER 1
93#define CONFIG_PHYLIB
94#define CONFIG_BITBANGMII
95#define CONFIG_BITBANGMII_MULTI
96#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
97#define CONFIG_PHY_VITESSE
98
99#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
100#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
101#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
102#define SH7752EVB_ETHERNET_MAC_SIZE 17
103#define SH7752EVB_ETHERNET_NUM_CH 2
104#define CONFIG_BOARD_LATE_INIT
105
106/* SPI */
107#define CONFIG_SH_SPI 1
108#define CONFIG_SH_SPI_BASE 0xfe002000
109#define CONFIG_SPI_FLASH
110#define CONFIG_SPI_FLASH_STMICRO 1
111#define CONFIG_SPI_FLASH_MACRONIX 1
112
113/* MMCIF */
114#define CONFIG_MMC 1
115#define CONFIG_GENERIC_MMC 1
116#define CONFIG_SH_MMCIF 1
117#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
118#define CONFIG_SH_MMCIF_CLK 48000000
119
120/* ENV setting */
121#define CONFIG_ENV_IS_EMBEDDED
122#define CONFIG_ENV_IS_IN_SPI_FLASH
123#define CONFIG_ENV_SECT_SIZE (64 * 1024)
124#define CONFIG_ENV_ADDR (0x00080000)
125#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
126#define CONFIG_ENV_OVERWRITE 1
127#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
128#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
129#define CONFIG_EXTRA_ENV_SETTINGS \
130 "netboot=bootp; bootm\0"
131
132/* Board Clock */
133#define CONFIG_SYS_CLK_FREQ 48000000
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900134#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
135#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +0000136#define CONFIG_SYS_TMU_CLK_DIV 4
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +0000137#endif /* __SH7752EVB_H */