blob: 6a02188108f0c4a2a3135457b3d2793e2ce01306 [file] [log] [blame]
Sedji Gaouaou22ee6472009-07-09 10:16:29 +02001/*
2 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Sedji Gaouaou22ee6472009-07-09 10:16:29 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000030#include <asm/hardware.h>
31
Jens Scharsig425de622010-02-03 22:45:42 +010032#define CONFIG_AT91_LEGACY
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000033#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Jens Scharsig425de622010-02-03 22:45:42 +010034
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020035/* ARM asynchronous clock */
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000036#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
37#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
38#define CONFIG_SYS_HZ 1000
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020039
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000040#define CONFIG_AT91SAM9M10G45EK
41#define CONFIG_AT91FAMILY
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020042#define CONFIG_ARCH_CPU_INIT
43#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000045#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020048#define CONFIG_SKIP_LOWLEVEL_INIT
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000049#define CONFIG_BOARD_EARLY_INIT_F
50#define CONFIG_DISPLAY_CPUINFO
51
52/* general purpose I/O */
53#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
54#define CONFIG_AT91_GPIO
55#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
56
57/* serial console */
58#define CONFIG_ATMEL_USART
59#define CONFIG_USART_BASE ATMEL_BASE_DBGU
60#define CONFIG_USART_ID ATMEL_ID_SYS
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020061
62/*
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000063 * This needs to be defined for the OHCI code to work but it is defined as
64 * ATMEL_ID_UHPHS in the CPU specific header files.
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020065 */
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000066#define ATMEL_ID_UHP ATMEL_ID_UHPHS
67
68/*
69 * Specify the clock enable bit in the PMC_SCER register.
70 */
71#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020072
73/* LCD */
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000074#define CONFIG_LCD
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020075#define LCD_BPP LCD_COLOR8
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000076#define CONFIG_LCD_LOGO
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020077#undef LCD_TEST_PATTERN
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000078#define CONFIG_LCD_INFO
79#define CONFIG_LCD_INFO_BELOW_LOGO
80#define CONFIG_SYS_WHITE_ON_BLACK
81#define CONFIG_ATMEL_LCD
82#define CONFIG_ATMEL_LCD_RGB565
83#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Sedji Gaouaou22ee6472009-07-09 10:16:29 +020084/* board specific(not enough SRAM) */
85#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
86
87/* LED */
88#define CONFIG_AT91_LED
89#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
90#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
91
92#define CONFIG_BOOTDELAY 3
93
94/*
95 * BOOTP options
96 */
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +000097#define CONFIG_BOOTP_BOOTFILESIZE
98#define CONFIG_BOOTP_BOOTPATH
99#define CONFIG_BOOTP_GATEWAY
100#define CONFIG_BOOTP_HOSTNAME
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200101
102/*
103 * Command line configuration.
104 */
105#include <config_cmd_default.h>
106#undef CONFIG_CMD_BDI
107#undef CONFIG_CMD_FPGA
108#undef CONFIG_CMD_IMI
109#undef CONFIG_CMD_IMLS
110#undef CONFIG_CMD_AUTOSCRIPT
111#undef CONFIG_CMD_LOADS
112
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000113#define CONFIG_CMD_PING
114#define CONFIG_CMD_DHCP
115#define CONFIG_CMD_NAND
116#define CONFIG_CMD_USB
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200117
118/* SDRAM */
119#define CONFIG_NR_DRAM_BANKS 1
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000120#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
121#define CONFIG_SYS_SDRAM_SIZE 0x08000000
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200122
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000123#define CONFIG_SYS_INIT_SP_ADDR \
124 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200125
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000126/* No NOR flash */
127#define CONFIG_SYS_NO_FLASH
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200128
129/* NAND flash */
130#ifdef CONFIG_CMD_NAND
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200131#define CONFIG_NAND_ATMEL
132#define CONFIG_SYS_MAX_NAND_DEVICE 1
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000133#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
134#define CONFIG_SYS_NAND_DBW_8
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200135/* our ALE is AD21 */
136#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
137/* our CLE is AD22 */
138#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
139#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
140#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200141
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200142#endif
143
144/* Ethernet */
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000145#define CONFIG_MACB
146#define CONFIG_RMII
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200147#define CONFIG_NET_RETRY_COUNT 20
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000148#define CONFIG_RESET_PHY_R
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200149
150/* USB */
151#define CONFIG_USB_ATMEL
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000152#define CONFIG_USB_OHCI_NEW
153#define CONFIG_DOS_PARTITION
154#define CONFIG_SYS_USB_OHCI_CPU_INIT
155#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_HCI
156#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200157#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000158#define CONFIG_USB_STORAGE
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200159
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000160#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200161
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000162#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
163#define CONFIG_SYS_MEMTEST_END 0x23e00000
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200164
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000165/* bootstrap + u-boot + env in nandflash */
166#define CONFIG_ENV_IS_IN_NAND
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200167#define CONFIG_ENV_OFFSET 0x60000
168#define CONFIG_ENV_OFFSET_REDUND 0x80000
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000169#define CONFIG_ENV_SIZE 0x20000
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200170
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000171#define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \
172 "bootm 0x70000000"
173#define CONFIG_BOOTARGS \
174 "console=ttyS0,115200 earlyprintk " \
175 "root=/dev/mtdblock5 " \
176 "mtdparts=atmel_nand:128k(bootstrap)ro," \
177 "256k(uboot)ro,128k(env1)ro,128k(env2)ro," \
178 "2M@1M(linux),-(root) " \
179 "rw rootfstype=jffs2"
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200180
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000181#define CONFIG_BAUDRATE 115200
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200182#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
183
184#define CONFIG_SYS_PROMPT "U-Boot> "
185#define CONFIG_SYS_CBSIZE 256
186#define CONFIG_SYS_MAXARGS 16
187#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Thomas Petazzoni5cfeec52011-08-04 11:08:50 +0000188#define CONFIG_SYS_LONGHELP
189#define CONFIG_CMDLINE_EDITING
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200190#define CONFIG_AUTO_COMPLETE
191#define CONFIG_SYS_HUSH_PARSER
192#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
193
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200194/*
195 * Size of malloc() pool
196 */
197#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Sedji Gaouaou22ee6472009-07-09 10:16:29 +0200198
199#define CONFIG_STACKSIZE (32*1024) /* regular stack */
200
201#ifdef CONFIG_USE_IRQ
202#error CONFIG_USE_IRQ not supported
203#endif
204
205#endif