blob: cfab8b0412344a1f0d7467d461c15d45c162b9fe [file] [log] [blame]
Simon Glassdde3b702012-02-23 03:28:41 +00001/*
2 * Copyright (c) 2004-2008 Texas Instruments
3 *
4 * (C) Copyright 2002
5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glassdde3b702012-02-23 03:28:41 +00008 */
9
Marc Zyngierbf433af2014-07-12 14:24:02 +010010#include <config.h>
11
Simon Glassdde3b702012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
Simon Glassc1352112016-03-13 19:07:29 -060017#ifndef CONFIG_CMDLINE
18 /DISCARD/ : { *(.u_boot_list_2_cmd_*) }
19#endif
Wang Dongshengc5e954e2016-01-18 11:02:40 +080020#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
Peng Fand47cb0b2015-10-23 10:13:03 +080021 /*
Wang Dongshengc5e954e2016-01-18 11:02:40 +080022 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
23 * bundle with u-boot, and code offsets are fixed. Secure zone
24 * only needs to be copied from the loading address to
25 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
26 * address for secure code.
Peng Fand47cb0b2015-10-23 10:13:03 +080027 *
Wang Dongshengc5e954e2016-01-18 11:02:40 +080028 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
29 * be included in u-boot address space, and some absolute address
30 * were used in secure code. The absolute addresses of the secure
31 * code also needs to be relocated along with the accompanying u-boot
32 * code.
33 *
34 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
Peng Fand47cb0b2015-10-23 10:13:03 +080035 */
36 /DISCARD/ : { *(.rel._secure*) }
Wang Dongshengc5e954e2016-01-18 11:02:40 +080037#endif
Simon Glassdde3b702012-02-23 03:28:41 +000038 . = 0x00000000;
39
40 . = ALIGN(4);
41 .text :
42 {
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020043 *(.__image_copy_start)
Albert ARIBAUD41623c92014-04-15 16:13:51 +020044 *(.vectors)
Stephen Warrenb68d6712012-10-22 06:19:32 +000045 CPUDIR/start.o (.text*)
46 *(.text*)
Simon Glassdde3b702012-02-23 03:28:41 +000047 }
48
Jan Kiszka104d6fb2015-04-21 07:18:24 +020049#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierbf433af2014-07-12 14:24:02 +010050
51#ifndef CONFIG_ARMV7_SECURE_BASE
52#define CONFIG_ARMV7_SECURE_BASE
53#endif
54
55 .__secure_start : {
56 . = ALIGN(0x1000);
57 *(.__secure_start)
58 }
59
60 .secure_text CONFIG_ARMV7_SECURE_BASE :
61 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
62 {
63 *(._secure.text)
64 }
65
66 . = LOADADDR(.__secure_start) +
67 SIZEOF(.__secure_start) +
68 SIZEOF(.secure_text);
69
70 __secure_end_lma = .;
71 .__secure_end : AT(__secure_end_lma) {
72 *(.__secure_end)
73 LONG(0x1d1071c); /* Must output something to reset LMA */
74 }
75#endif
76
Simon Glassdde3b702012-02-23 03:28:41 +000077 . = ALIGN(4);
78 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
79
80 . = ALIGN(4);
81 .data : {
Stephen Warrenb68d6712012-10-22 06:19:32 +000082 *(.data*)
Simon Glassdde3b702012-02-23 03:28:41 +000083 }
84
85 . = ALIGN(4);
86
87 . = .;
Simon Glassdde3b702012-02-23 03:28:41 +000088
89 . = ALIGN(4);
Marek Vasut55675142012-10-12 10:27:03 +000090 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000091 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000092 }
93
94 . = ALIGN(4);
Simon Glassdde3b702012-02-23 03:28:41 +000095
Alexander Graf50149ea2016-03-04 01:10:01 +010096 .__efi_runtime_start : {
97 *(.__efi_runtime_start)
98 }
99
100 .efi_runtime : {
101 *(efi_runtime_text)
102 *(efi_runtime_data)
103 }
104
105 .__efi_runtime_stop : {
106 *(.__efi_runtime_stop)
107 }
108
109 .efi_runtime_rel_start :
110 {
111 *(.__efi_runtime_rel_start)
112 }
113
114 .efi_runtime_rel : {
115 *(.relefi_runtime_text)
116 *(.relefi_runtime_data)
117 }
118
119 .efi_runtime_rel_stop :
120 {
121 *(.__efi_runtime_rel_stop)
122 }
123
124 . = ALIGN(4);
125
Albert ARIBAUDd026dec2013-06-11 14:17:33 +0200126 .image_copy_end :
127 {
128 *(.__image_copy_end)
129 }
Simon Glassdde3b702012-02-23 03:28:41 +0000130
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +0200131 .rel_dyn_start :
132 {
133 *(.__rel_dyn_start)
134 }
135
Simon Glassdde3b702012-02-23 03:28:41 +0000136 .rel.dyn : {
Simon Glassdde3b702012-02-23 03:28:41 +0000137 *(.rel*)
Albert ARIBAUD47bd65e2013-06-11 14:17:34 +0200138 }
139
140 .rel_dyn_end :
141 {
142 *(.__rel_dyn_end)
Simon Glassdde3b702012-02-23 03:28:41 +0000143 }
144
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100145 .end :
146 {
147 *(.__end)
148 }
149
150 _image_binary_end = .;
Simon Glassdde3b702012-02-23 03:28:41 +0000151
152 /*
153 * Deprecated: this MMU section is used by pxa at present but
154 * should not be used by new boards/CPUs.
155 */
156 . = ALIGN(4096);
157 .mmutable : {
158 *(.mmutable)
159 }
160
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000161/*
162 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
163 * __bss_base and __bss_limit are for linker only (overlay ordering)
164 */
165
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000166 .bss_start __rel_dyn_start (OVERLAY) : {
167 KEEP(*(.__bss_start));
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000168 __bss_base = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000169 }
170
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000171 .bss __bss_base (OVERLAY) : {
Stephen Warrenb68d6712012-10-22 06:19:32 +0000172 *(.bss*)
Simon Glassdde3b702012-02-23 03:28:41 +0000173 . = ALIGN(4);
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000174 __bss_limit = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +0000175 }
Tom Rini0ce033d2013-03-18 12:31:00 -0400176
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +0000177 .bss_end __bss_limit (OVERLAY) : {
178 KEEP(*(.__bss_end));
Simon Glassdde3b702012-02-23 03:28:41 +0000179 }
180
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +0100181 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100182 .dynbss : { *(.dynbss) }
183 .dynstr : { *(.dynstr*) }
184 .dynamic : { *(.dynamic*) }
185 .plt : { *(.plt*) }
186 .interp : { *(.interp*) }
Andreas Färber2c67e0e2014-01-27 05:48:11 +0100187 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD47ed5dd2013-11-07 14:21:46 +0100188 .gnu : { *(.gnu*) }
189 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDb02bfc42014-01-13 14:57:05 +0100190 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glassdde3b702012-02-23 03:28:41 +0000191}