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Chander Kashyapb9a1ef22011-08-18 22:37:19 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap393cb362011-12-06 23:34:12 +00004 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
Chander Kashyapb9a1ef22011-08-18 22:37:19 +00005 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyapb9a1ef22011-08-18 22:37:19 +00007 */
8
Piotr Wilczekbf7716d2014-03-07 14:59:46 +01009#ifndef __CONFIG_ORIGEN_H
10#define __CONFIG_ORIGEN_H
11
Simon Glass4c7bb1d2014-10-07 22:01:44 -060012#include <configs/exynos4-common.h>
Piotr Wilczekbf7716d2014-03-07 14:59:46 +010013
14#define CONFIG_SYS_PROMPT "ORIGEN # "
15
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000016
17/* High Level Configuration Options */
Chander Kashyap393cb362011-12-06 23:34:12 +000018#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000019#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
20
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000021#define CONFIG_SYS_DCACHE_OFF 1
22
Piotr Wilczekbf7716d2014-03-07 14:59:46 +010023/* ORIGEN has 4 bank of DRAM */
24#define CONFIG_NR_DRAM_BANKS 4
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000025#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekbf7716d2014-03-07 14:59:46 +010026#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
27#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
28
29/* memtest works on */
30#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000034#define CONFIG_SYS_TEXT_BASE 0x43E00000
35
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000036#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
37
Piotr Wilczekbf7716d2014-03-07 14:59:46 +010038/* select serial console configuration */
39#define CONFIG_SERIAL2
40#define CONFIG_BAUDRATE 115200
41
42/* Console configuration */
43#define CONFIG_SYS_CONSOLE_INFO_QUIET
44#define CONFIG_SYS_CONSOLE_IS_IN_ENV
45#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
46
47#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
48
49#define CONFIG_SYS_MONITOR_BASE 0x00000000
50
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000051/* Power Down Modes */
52#define S5P_CHECK_SLEEP 0x00000BAD
53#define S5P_CHECK_DIDLE 0xBAD00000
54#define S5P_CHECK_LPA 0xABAD0000
55
Joe Hershberger80615002012-05-23 07:57:57 +000056#undef CONFIG_CMD_PING
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000057#define CONFIG_CMD_ELF
58#define CONFIG_CMD_DHCP
Guillaume GARDET7741c8b2014-10-08 15:04:38 +020059#define CONFIG_CMD_EXT2
60#define CONFIG_CMD_FS_GENERIC
61#define CONFIG_CMD_BOOTZ
62#define CONFIG_SUPPORT_RAW_INITRD
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000063
Chander Kashyap98a48c52011-08-18 22:37:20 +000064/* MMC SPL */
Chander Kashyap98a48c52011-08-18 22:37:20 +000065#define COPY_BL2_FNPTR_ADDR 0x02020030
Inderpal Singh8a000612013-04-04 23:09:21 +000066#define CONFIG_SPL_TEXT_BASE 0x02021410
67
Guillaume GARDET7741c8b2014-10-08 15:04:38 +020068#define CONFIG_EXTRA_ENV_SETTINGS \
69 "loadaddr=0x40007000\0" \
70 "rdaddr=0x48000000\0" \
71 "kerneladdr=0x40007000\0" \
72 "ramdiskaddr=0x48000000\0" \
73 "console=ttySAC2,115200n8\0" \
74 "mmcdev=0\0" \
75 "bootenv=uEnv.txt\0" \
76 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
77 "importbootenv=echo Importing environment from mmc ...; " \
78 "env import -t $loadaddr $filesize\0" \
79 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
80 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
81 "source ${loadaddr}\0"
82#define CONFIG_BOOTCOMMAND \
83 "if mmc rescan; then " \
84 "echo SD/MMC found on device ${mmcdev};" \
85 "if run loadbootenv; then " \
86 "echo Loaded environment from ${bootenv};" \
87 "run importbootenv;" \
88 "fi;" \
89 "if test -n $uenvcmd; then " \
90 "echo Running uenvcmd ...;" \
91 "run uenvcmd;" \
92 "fi;" \
93 "if run loadbootscript; then " \
94 "run bootscript; " \
95 "fi; " \
96 "fi;" \
97 "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000098
Chander Kashyapb9a1ef22011-08-18 22:37:19 +000099#define CONFIG_IDENT_STRING " for ORIGEN"
100
Chander Kashyapb9a1ef22011-08-18 22:37:19 +0000101#define CONFIG_CLK_1000_400_200
102
103/* MIU (Memory Interleaving Unit) */
104#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
105
Piotr Wilczekbf7716d2014-03-07 14:59:46 +0100106#define CONFIG_ENV_IS_IN_MMC
Chander Kashyapb9a1ef22011-08-18 22:37:19 +0000107#define CONFIG_SYS_MMC_ENV_DEV 0
108#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
109#define RESERVE_BLOCK_SIZE (512)
110#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
111#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
Chander Kashyapb9a1ef22011-08-18 22:37:19 +0000112
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +0530113#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
114#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
115
116#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyap98a48c52011-08-18 22:37:20 +0000117
118/* U-boot copy size from boot Media to DRAM.*/
119#define COPY_BL2_SIZE 0x80000
120#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
121#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
Angus Ainslie099e8842011-09-09 12:02:02 +0000122
Chander Kashyapb9a1ef22011-08-18 22:37:19 +0000123#endif /* __CONFIG_H */