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Tim Harvey91baa6f2014-02-12 23:48:12 -08001/*
2 * Copyright (C) 2014 Gateworks Corporation
3 * Tim Harvey <tharvey@gateworks.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __PFUZE100_PMIC_H_
9#define __PFUZE100_PMIC_H_
10
11/* PFUZE100 registers */
12enum {
13 PFUZE100_DEVICEID = 0x00,
14 PFUZE100_REVID = 0x03,
15 PFUZE100_FABID = 0x04,
16
17 PFUZE100_SW1ABVOL = 0x20,
Fabio Estevam66ca09f2014-05-09 13:15:42 -030018 PFUZE100_SW1ABSTBY = 0x21,
Peng Fanccbb1872015-01-08 21:00:36 +080019 PFUZE100_SW1ABOFF = 0x22,
20 PFUZE100_SW1ABMODE = 0x23,
Peng Fan3fd10f32015-05-18 13:37:26 +080021 PFUZE100_SW1ABCONF = 0x24,
Tim Harvey91baa6f2014-02-12 23:48:12 -080022 PFUZE100_SW1CVOL = 0x2e,
Fabio Estevam66ca09f2014-05-09 13:15:42 -030023 PFUZE100_SW1CSTBY = 0x2f,
Peng Fanccbb1872015-01-08 21:00:36 +080024 PFUZE100_SW1COFF = 0x30,
25 PFUZE100_SW1CMODE = 0x31,
Fabio Estevam66ca09f2014-05-09 13:15:42 -030026 PFUZE100_SW1CCONF = 0x32,
Tim Harvey91baa6f2014-02-12 23:48:12 -080027 PFUZE100_SW2VOL = 0x35,
Peng Fanccbb1872015-01-08 21:00:36 +080028 PFUZE100_SW2STBY = 0x36,
29 PFUZE100_SW2OFF = 0x37,
30 PFUZE100_SW2MODE = 0x38,
31 PFUZE100_SW2CONF = 0x39,
Tim Harvey91baa6f2014-02-12 23:48:12 -080032 PFUZE100_SW3AVOL = 0x3c,
Peng Fanccbb1872015-01-08 21:00:36 +080033 PFUZE100_SW3ASTBY = 0x3D,
34 PFUZE100_SW3AOFF = 0x3E,
35 PFUZE100_SW3AMODE = 0x3F,
36 PFUZE100_SW3ACONF = 0x40,
Tim Harvey91baa6f2014-02-12 23:48:12 -080037 PFUZE100_SW3BVOL = 0x43,
Peng Fanccbb1872015-01-08 21:00:36 +080038 PFUZE100_SW3BSTBY = 0x44,
39 PFUZE100_SW3BOFF = 0x45,
40 PFUZE100_SW3BMODE = 0x46,
41 PFUZE100_SW3BCONF = 0x47,
Tim Harvey91baa6f2014-02-12 23:48:12 -080042 PFUZE100_SW4VOL = 0x4a,
Peng Fanccbb1872015-01-08 21:00:36 +080043 PFUZE100_SW4STBY = 0x4b,
44 PFUZE100_SW4OFF = 0x4c,
45 PFUZE100_SW4MODE = 0x4d,
46 PFUZE100_SW4CONF = 0x4e,
Tim Harvey91baa6f2014-02-12 23:48:12 -080047 PFUZE100_SWBSTCON1 = 0x66,
48 PFUZE100_VREFDDRCON = 0x6a,
49 PFUZE100_VSNVSVOL = 0x6b,
50 PFUZE100_VGEN1VOL = 0x6c,
51 PFUZE100_VGEN2VOL = 0x6d,
52 PFUZE100_VGEN3VOL = 0x6e,
53 PFUZE100_VGEN4VOL = 0x6f,
54 PFUZE100_VGEN5VOL = 0x70,
55 PFUZE100_VGEN6VOL = 0x71,
56
57 PMIC_NUM_OF_REGS = 0x7f,
58};
59
Peng Fan8fa46352015-08-07 16:43:45 +080060/* Registor offset based on VOLT register */
61#define PFUZE100_VOL_OFFSET 0
62#define PFUZE100_STBY_OFFSET 1
63#define PFUZE100_OFF_OFFSET 2
64#define PFUZE100_MODE_OFFSET 3
65#define PFUZE100_CONF_OFFSET 4
66
Tim Harvey91baa6f2014-02-12 23:48:12 -080067/*
Ye.Li36523e92014-11-06 16:28:58 +080068 * Buck Regulators
69 */
70
Peng Fanee52f1a2015-01-09 16:59:41 +080071#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
72
Ye.Li36523e92014-11-06 16:28:58 +080073/* SW1A/B/C Output Voltage Configuration */
74#define SW1x_0_300V 0
75#define SW1x_0_325V 1
76#define SW1x_0_350V 2
77#define SW1x_0_375V 3
78#define SW1x_0_400V 4
79#define SW1x_0_425V 5
80#define SW1x_0_450V 6
81#define SW1x_0_475V 7
82#define SW1x_0_500V 8
83#define SW1x_0_525V 9
84#define SW1x_0_550V 10
85#define SW1x_0_575V 11
86#define SW1x_0_600V 12
87#define SW1x_0_625V 13
88#define SW1x_0_650V 14
89#define SW1x_0_675V 15
90#define SW1x_0_700V 16
91#define SW1x_0_725V 17
92#define SW1x_0_750V 18
93#define SW1x_0_775V 19
94#define SW1x_0_800V 20
95#define SW1x_0_825V 21
96#define SW1x_0_850V 22
97#define SW1x_0_875V 23
98#define SW1x_0_900V 24
99#define SW1x_0_925V 25
100#define SW1x_0_950V 26
101#define SW1x_0_975V 27
102#define SW1x_1_000V 28
103#define SW1x_1_025V 29
104#define SW1x_1_050V 30
105#define SW1x_1_075V 31
106#define SW1x_1_100V 32
107#define SW1x_1_125V 33
108#define SW1x_1_150V 34
109#define SW1x_1_175V 35
110#define SW1x_1_200V 36
111#define SW1x_1_225V 37
112#define SW1x_1_250V 38
113#define SW1x_1_275V 39
114#define SW1x_1_300V 40
115#define SW1x_1_325V 41
116#define SW1x_1_350V 42
117#define SW1x_1_375V 43
118#define SW1x_1_400V 44
119#define SW1x_1_425V 45
120#define SW1x_1_450V 46
121#define SW1x_1_475V 47
122#define SW1x_1_500V 48
123#define SW1x_1_525V 49
124#define SW1x_1_550V 50
125#define SW1x_1_575V 51
126#define SW1x_1_600V 52
127#define SW1x_1_625V 53
128#define SW1x_1_650V 54
129#define SW1x_1_675V 55
130#define SW1x_1_700V 56
131#define SW1x_1_725V 57
132#define SW1x_1_750V 58
133#define SW1x_1_775V 59
134#define SW1x_1_800V 60
135#define SW1x_1_825V 61
136#define SW1x_1_850V 62
137#define SW1x_1_875V 63
138
139#define SW1x_NORMAL_MASK 0x3f
140#define SW1x_STBY_MASK 0x3f
141#define SW1x_OFF_MASK 0x3f
142
Peng Fan8fa46352015-08-07 16:43:45 +0800143#define SW_MODE_MASK 0xf
144#define SW_MODE_SHIFT 0
145
Ye.Li36523e92014-11-06 16:28:58 +0800146#define SW1xCONF_DVSSPEED_MASK 0xc0
147#define SW1xCONF_DVSSPEED_2US 0x00
148#define SW1xCONF_DVSSPEED_4US 0x40
149#define SW1xCONF_DVSSPEED_8US 0x80
150#define SW1xCONF_DVSSPEED_16US 0xc0
151
152/*
Tim Harvey91baa6f2014-02-12 23:48:12 -0800153 * LDO Configuration
154 */
155
156/* VGEN1/2 Voltage Configuration */
157#define LDOA_0_80V 0
158#define LDOA_0_85V 1
159#define LDOA_0_90V 2
160#define LDOA_0_95V 3
161#define LDOA_1_00V 4
162#define LDOA_1_05V 5
163#define LDOA_1_10V 6
164#define LDOA_1_15V 7
165#define LDOA_1_20V 8
166#define LDOA_1_25V 9
167#define LDOA_1_30V 10
168#define LDOA_1_35V 11
169#define LDOA_1_40V 12
170#define LDOA_1_45V 13
171#define LDOA_1_50V 14
172#define LDOA_1_55V 15
173
174/* VGEN3/4/5/6 Voltage Configuration */
175#define LDOB_1_80V 0
176#define LDOB_1_90V 1
177#define LDOB_2_00V 2
178#define LDOB_2_10V 3
179#define LDOB_2_20V 4
180#define LDOB_2_30V 5
181#define LDOB_2_40V 6
182#define LDOB_2_50V 7
183#define LDOB_2_60V 8
184#define LDOB_2_70V 9
185#define LDOB_2_80V 10
186#define LDOB_2_90V 11
187#define LDOB_3_00V 12
188#define LDOB_3_10V 13
189#define LDOB_3_20V 14
190#define LDOB_3_30V 15
191
192#define LDO_VOL_MASK 0xf
Tim Harvey76962d02015-04-03 16:56:16 -0700193#define LDO_EN (1 << 4)
Peng Fan8fa46352015-08-07 16:43:45 +0800194#define LDO_MODE_SHIFT 4
195#define LDO_MODE_MASK (1 << 4)
196#define LDO_MODE_OFF 0
197#define LDO_MODE_ON 1
Tim Harvey91baa6f2014-02-12 23:48:12 -0800198
Peng Fan8fa46352015-08-07 16:43:45 +0800199#define VREFDDRCON_EN (1 << 4)
Tim Harvey91baa6f2014-02-12 23:48:12 -0800200/*
201 * Boost Regulator
202 */
203
204/* SWBST Output Voltage */
205#define SWBST_5_00V 0
206#define SWBST_5_05V 1
207#define SWBST_5_10V 2
208#define SWBST_5_15V 3
209
210#define SWBST_VOL_MASK 0x3
Peng Fan430abe12015-08-07 16:43:41 +0800211#define SWBST_MODE_MASK 0xC
Peng Fan8fa46352015-08-07 16:43:45 +0800212#define SWBST_MODE_SHIFT 0x2
213#define SWBST_MODE_OFF 0
214#define SWBST_MODE_PFM 1
215#define SWBST_MODE_AUTO 2
216#define SWBST_MODE_APS 3
Tim Harvey91baa6f2014-02-12 23:48:12 -0800217
Peng Fanccbb1872015-01-08 21:00:36 +0800218/*
219 * Regulator Mode Control
220 *
221 * OFF: The regulator is switched off and the output voltage is discharged.
222 * PFM: In this mode, the regulator is always in PFM mode, which is useful
223 * at light loads for optimized efficiency.
224 * PWM: In this mode, the regulator is always in PWM mode operation
225 * regardless of load conditions.
226 * APS: In this mode, the regulator moves automatically between pulse
227 * skipping mode and PWM mode depending on load conditions.
228 *
229 * SWxMODE[3:0]
230 * Normal Mode | Standby Mode | value
231 * OFF OFF 0x0
232 * PWM OFF 0x1
233 * PFM OFF 0x3
234 * APS OFF 0x4
235 * PWM PWM 0x5
236 * PWM APS 0x6
237 * APS APS 0x8
238 * APS PFM 0xc
239 * PWM PFM 0xd
240 */
241#define OFF_OFF 0x0
242#define PWM_OFF 0x1
243#define PFM_OFF 0x3
244#define APS_OFF 0x4
245#define PWM_PWM 0x5
246#define PWM_APS 0x6
247#define APS_APS 0x8
248#define APS_PFM 0xc
249#define PWM_PFM 0xd
250
Stefano Babica4f7d092015-02-11 12:35:46 +0100251#define SWITCH_SIZE 0x7
252
Tim Harvey93a6d922014-04-22 21:53:56 -0700253int power_pfuze100_init(unsigned char bus);
Tim Harvey91baa6f2014-02-12 23:48:12 -0800254#endif