blob: c3f77372562b4489a3b72fe6e818f2e426d06547 [file] [log] [blame]
Niel Fouriec1a215b2021-01-21 13:19:18 +01001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
4 *
5 * Copyright 2013 Freescale Semiconductor Inc.
6 */
7
8dma0: dma@100300 {
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "fsl,elo3-dma";
12 reg = <0x100300 0x4>,
13 <0x100600 0x4>;
14 ranges = <0x0 0x100100 0x500>;
15 dma-channel@0 {
16 compatible = "fsl,eloplus-dma-channel";
17 reg = <0x0 0x80>;
18 interrupts = <28 2 0 0>;
19 };
20 dma-channel@80 {
21 compatible = "fsl,eloplus-dma-channel";
22 reg = <0x80 0x80>;
23 interrupts = <29 2 0 0>;
24 };
25 dma-channel@100 {
26 compatible = "fsl,eloplus-dma-channel";
27 reg = <0x100 0x80>;
28 interrupts = <30 2 0 0>;
29 };
30 dma-channel@180 {
31 compatible = "fsl,eloplus-dma-channel";
32 reg = <0x180 0x80>;
33 interrupts = <31 2 0 0>;
34 };
35 dma-channel@300 {
36 compatible = "fsl,eloplus-dma-channel";
37 reg = <0x300 0x80>;
38 interrupts = <76 2 0 0>;
39 };
40 dma-channel@380 {
41 compatible = "fsl,eloplus-dma-channel";
42 reg = <0x380 0x80>;
43 interrupts = <77 2 0 0>;
44 };
45 dma-channel@400 {
46 compatible = "fsl,eloplus-dma-channel";
47 reg = <0x400 0x80>;
48 interrupts = <78 2 0 0>;
49 };
50 dma-channel@480 {
51 compatible = "fsl,eloplus-dma-channel";
52 reg = <0x480 0x80>;
53 interrupts = <79 2 0 0>;
54 };
55};