blob: ff348d70f1cacd76286e0ff2f34525595da9655f [file] [log] [blame]
Gaurav Jain5e2ff132022-03-24 11:50:36 +05301// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2/*
3 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
4 *
5 * Copyright 2011 Freescale Semiconductor Inc.
6 */
7
8crypto: crypto@300000 {
9 compatible = "fsl,sec-v4.0";
10 fsl,sec-era = <1>;
11 #address-cells = <1>;
12 #size-cells = <1>;
13 reg = <0x300000 0x10000>;
14 ranges = <0 0x300000 0x10000>;
15 interrupts = <92 2 0 0>;
16
17 sec_jr0: jr@1000 {
18 compatible = "fsl,sec-v4.0-job-ring";
19 reg = <0x1000 0x1000>;
20 interrupts = <88 2 0 0>;
21 };
22
23 sec_jr1: jr@2000 {
24 compatible = "fsl,sec-v4.0-job-ring";
25 reg = <0x2000 0x1000>;
26 interrupts = <89 2 0 0>;
27 };
28
29 sec_jr2: jr@3000 {
30 compatible = "fsl,sec-v4.0-job-ring";
31 reg = <0x3000 0x1000>;
32 interrupts = <90 2 0 0>;
33 };
34
35 sec_jr3: jr@4000 {
36 compatible = "fsl,sec-v4.0-job-ring";
37 reg = <0x4000 0x1000>;
38 interrupts = <91 2 0 0>;
39 };
40
41 rtic@6000 {
42 compatible = "fsl,sec-v4.0-rtic";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 reg = <0x6000 0x100>;
46 ranges = <0x0 0x6100 0xe00>;
47
48 rtic_a: rtic-a@0 {
49 compatible = "fsl,sec-v4.0-rtic-memory";
50 reg = <0x00 0x20 0x100 0x80>;
51 };
52
53 rtic_b: rtic-b@20 {
54 compatible = "fsl,sec-v4.0-rtic-memory";
55 reg = <0x20 0x20 0x200 0x80>;
56 };
57
58 rtic_c: rtic-c@40 {
59 compatible = "fsl,sec-v4.0-rtic-memory";
60 reg = <0x40 0x20 0x300 0x80>;
61 };
62
63 rtic_d: rtic-d@60 {
64 compatible = "fsl,sec-v4.0-rtic-memory";
65 reg = <0x60 0x20 0x500 0x80>;
66 };
67 };
68};
69
70sec_mon: sec_mon@314000 {
71 compatible = "fsl,sec-v4.0-mon";
72 reg = <0x314000 0x1000>;
73 interrupts = <93 2 0 0>;
74};