Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Device Tree Source for the Socrates board (MPC8544). |
| 4 | * |
| 5 | * Copyright (c) 2008 Emcraft Systems. |
| 6 | * Sergei Poselenov, <sposelenov@emcraft.com> |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | /dts-v1/; |
| 11 | |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 12 | /include/ "e500v2_power_isa.dtsi" |
| 13 | |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 14 | / { |
| 15 | model = "abb,socrates"; |
| 16 | compatible = "abb,socrates"; |
| 17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; |
| 19 | |
| 20 | aliases { |
| 21 | ethernet0 = &enet0; |
| 22 | ethernet1 = &enet1; |
| 23 | serial0 = &serial0; |
| 24 | serial1 = &serial1; |
| 25 | pci0 = &pci0; |
| 26 | }; |
| 27 | |
| 28 | cpus { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | |
| 32 | PowerPC,8544@0 { |
| 33 | device_type = "cpu"; |
| 34 | reg = <0>; |
| 35 | d-cache-line-size = <32>; |
| 36 | i-cache-line-size = <32>; |
| 37 | d-cache-size = <0x8000>; // L1, 32K |
| 38 | i-cache-size = <0x8000>; // L1, 32K |
| 39 | timebase-frequency = <0>; |
| 40 | bus-frequency = <0>; |
| 41 | clock-frequency = <0>; |
| 42 | next-level-cache = <&L2>; |
| 43 | }; |
| 44 | }; |
| 45 | |
| 46 | memory { |
| 47 | device_type = "memory"; |
| 48 | reg = <0x00000000 0x00000000>; // Filled in by U-Boot |
| 49 | }; |
| 50 | |
| 51 | soc8544@e0000000 { |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <1>; |
| 54 | device_type = "soc"; |
| 55 | |
| 56 | ranges = <0x00000000 0xe0000000 0x00100000>; |
| 57 | bus-frequency = <0>; // Filled in by U-Boot |
| 58 | compatible = "fsl,mpc8544-immr", "simple-bus"; |
| 59 | |
| 60 | ecm-law@0 { |
| 61 | compatible = "fsl,ecm-law"; |
| 62 | reg = <0x0 0x1000>; |
| 63 | fsl,num-laws = <10>; |
| 64 | }; |
| 65 | |
| 66 | ecm@1000 { |
| 67 | compatible = "fsl,mpc8544-ecm", "fsl,ecm"; |
| 68 | reg = <0x1000 0x1000>; |
| 69 | interrupts = <17 2>; |
| 70 | interrupt-parent = <&mpic>; |
| 71 | }; |
| 72 | |
| 73 | memory-controller@2000 { |
| 74 | compatible = "fsl,mpc8544-memory-controller"; |
| 75 | reg = <0x2000 0x1000>; |
| 76 | interrupt-parent = <&mpic>; |
| 77 | interrupts = <18 2>; |
| 78 | }; |
| 79 | |
| 80 | L2: l2-cache-controller@20000 { |
| 81 | compatible = "fsl,mpc8544-l2-cache-controller"; |
| 82 | reg = <0x20000 0x1000>; |
| 83 | cache-line-size = <32>; |
| 84 | cache-size = <0x40000>; // L2, 256K |
| 85 | interrupt-parent = <&mpic>; |
| 86 | interrupts = <16 2>; |
| 87 | }; |
| 88 | |
| 89 | i2c@3000 { |
| 90 | #address-cells = <1>; |
| 91 | #size-cells = <0>; |
| 92 | cell-index = <0>; |
| 93 | compatible = "fsl,mpc8544-i2c", "fsl-i2c"; |
| 94 | reg = <0x3000 0x100>; |
| 95 | interrupts = <43 2>; |
| 96 | interrupt-parent = <&mpic>; |
| 97 | fsl,preserve-clocking; |
| 98 | |
| 99 | dtt@28 { |
| 100 | compatible = "winbond,w83782d"; |
| 101 | reg = <0x28>; |
| 102 | }; |
| 103 | rtc@32 { |
| 104 | compatible = "epson,rx8025"; |
| 105 | reg = <0x32>; |
| 106 | interrupts = <7 1>; |
| 107 | interrupt-parent = <&mpic>; |
| 108 | }; |
| 109 | dtt@4c { |
| 110 | compatible = "dallas,ds75"; |
| 111 | reg = <0x4c>; |
| 112 | }; |
| 113 | ts@4a { |
| 114 | compatible = "ti,tsc2003"; |
| 115 | reg = <0x4a>; |
| 116 | interrupt-parent = <&mpic>; |
| 117 | interrupts = <8 1>; |
| 118 | }; |
| 119 | }; |
| 120 | |
| 121 | i2c@3100 { |
| 122 | #address-cells = <1>; |
| 123 | #size-cells = <0>; |
| 124 | cell-index = <1>; |
| 125 | compatible = "fsl,mpc8544-i2c", "fsl-i2c"; |
| 126 | reg = <0x3100 0x100>; |
| 127 | interrupts = <43 2>; |
| 128 | interrupt-parent = <&mpic>; |
| 129 | fsl,preserve-clocking; |
| 130 | }; |
| 131 | |
| 132 | enet0: ethernet@24000 { |
| 133 | #address-cells = <1>; |
| 134 | #size-cells = <1>; |
| 135 | cell-index = <0>; |
| 136 | device_type = "network"; |
| 137 | model = "eTSEC"; |
| 138 | compatible = "gianfar"; |
| 139 | reg = <0x24000 0x1000>; |
| 140 | ranges = <0x0 0x24000 0x1000>; |
| 141 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 142 | interrupts = <29 2 30 2 34 2>; |
| 143 | interrupt-parent = <&mpic>; |
| 144 | phy-handle = <&phy0>; |
| 145 | tbi-handle = <&tbi0>; |
| 146 | phy-connection-type = "rgmii-id"; |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 147 | }; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 148 | |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 149 | mdio@24520 { |
| 150 | #address-cells = <1>; |
| 151 | #size-cells = <0>; |
| 152 | compatible = "fsl,gianfar-mdio"; |
| 153 | reg = <0x24520 0x20>; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 154 | |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 155 | phy0: ethernet-phy@0 { |
| 156 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 157 | interrupt-parent = <&mpic>; |
| 158 | interrupts = <0 1>; |
| 159 | reg = <0>; |
| 160 | }; |
| 161 | |
| 162 | phy1: ethernet-phy@1 { |
| 163 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 164 | interrupt-parent = <&mpic>; |
| 165 | interrupts = <0 1>; |
| 166 | reg = <1>; |
| 167 | }; |
| 168 | tbi0: tbi-phy@11 { |
| 169 | reg = <0x11>; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 170 | }; |
| 171 | }; |
| 172 | |
| 173 | enet1: ethernet@26000 { |
| 174 | #address-cells = <1>; |
| 175 | #size-cells = <1>; |
| 176 | cell-index = <1>; |
| 177 | device_type = "network"; |
| 178 | model = "eTSEC"; |
| 179 | compatible = "gianfar"; |
| 180 | reg = <0x26000 0x1000>; |
| 181 | ranges = <0x0 0x26000 0x1000>; |
| 182 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 183 | interrupts = <31 2 32 2 33 2>; |
| 184 | interrupt-parent = <&mpic>; |
| 185 | phy-handle = <&phy1>; |
| 186 | tbi-handle = <&tbi1>; |
| 187 | phy-connection-type = "rgmii-id"; |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 188 | }; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 189 | |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 190 | mdio@26520 { |
| 191 | #address-cells = <1>; |
| 192 | #size-cells = <0>; |
| 193 | compatible = "fsl,gianfar-tbi"; |
| 194 | reg = <0x26520 0x20>; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 195 | |
Heiko Schocher | 73038dd | 2023-01-24 18:06:52 +0100 | [diff] [blame] | 196 | tbi1: tbi-phy@11 { |
| 197 | reg = <0x11>; |
Heiko Schocher | 7d8c77e | 2019-10-16 05:55:47 +0200 | [diff] [blame] | 198 | }; |
| 199 | }; |
| 200 | |
| 201 | serial0: serial@4500 { |
| 202 | cell-index = <0>; |
| 203 | device_type = "serial"; |
| 204 | compatible = "fsl,ns16550", "ns16550"; |
| 205 | reg = <0x4500 0x100>; |
| 206 | clock-frequency = <0>; |
| 207 | interrupts = <42 2>; |
| 208 | interrupt-parent = <&mpic>; |
| 209 | }; |
| 210 | |
| 211 | serial1: serial@4600 { |
| 212 | cell-index = <1>; |
| 213 | device_type = "serial"; |
| 214 | compatible = "fsl,ns16550", "ns16550"; |
| 215 | reg = <0x4600 0x100>; |
| 216 | clock-frequency = <0>; |
| 217 | interrupts = <42 2>; |
| 218 | interrupt-parent = <&mpic>; |
| 219 | }; |
| 220 | |
| 221 | global-utilities@e0000 { //global utilities block |
| 222 | compatible = "fsl,mpc8548-guts"; |
| 223 | reg = <0xe0000 0x1000>; |
| 224 | fsl,has-rstcr; |
| 225 | }; |
| 226 | |
| 227 | mpic: pic@40000 { |
| 228 | interrupt-controller; |
| 229 | #address-cells = <0>; |
| 230 | #interrupt-cells = <2>; |
| 231 | reg = <0x40000 0x40000>; |
| 232 | compatible = "chrp,open-pic"; |
| 233 | device_type = "open-pic"; |
| 234 | }; |
| 235 | }; |
| 236 | |
| 237 | |
| 238 | localbus { |
| 239 | compatible = "fsl,mpc8544-localbus", |
| 240 | "fsl,pq3-localbus", |
| 241 | "simple-bus"; |
| 242 | #address-cells = <2>; |
| 243 | #size-cells = <1>; |
| 244 | reg = <0xe0005000 0x40>; |
| 245 | interrupt-parent = <&mpic>; |
| 246 | interrupts = <19 2>; |
| 247 | |
| 248 | ranges = <0 0 0xfc000000 0x04000000 |
| 249 | 2 0 0xc8000000 0x04000000 |
| 250 | 3 0 0xc0000000 0x00100000 |
| 251 | >; /* Overwritten by U-Boot */ |
| 252 | |
| 253 | nor_flash@0,0 { |
| 254 | compatible = "amd,s29gl256n", "cfi-flash"; |
| 255 | bank-width = <2>; |
| 256 | reg = <0x0 0x000000 0x4000000>; |
| 257 | #address-cells = <1>; |
| 258 | #size-cells = <1>; |
| 259 | partition@0 { |
| 260 | label = "kernel"; |
| 261 | reg = <0x0 0x1e0000>; |
| 262 | read-only; |
| 263 | }; |
| 264 | partition@1e0000 { |
| 265 | label = "dtb"; |
| 266 | reg = <0x1e0000 0x20000>; |
| 267 | }; |
| 268 | partition@200000 { |
| 269 | label = "root"; |
| 270 | reg = <0x200000 0x200000>; |
| 271 | }; |
| 272 | partition@400000 { |
| 273 | label = "user"; |
| 274 | reg = <0x400000 0x3b80000>; |
| 275 | }; |
| 276 | partition@3f80000 { |
| 277 | label = "env"; |
| 278 | reg = <0x3f80000 0x40000>; |
| 279 | read-only; |
| 280 | }; |
| 281 | partition@3fc0000 { |
| 282 | label = "u-boot"; |
| 283 | reg = <0x3fc0000 0x40000>; |
| 284 | read-only; |
| 285 | }; |
| 286 | }; |
| 287 | |
| 288 | display@2,0 { |
| 289 | compatible = "fujitsu,lime"; |
| 290 | reg = <2 0x0 0x4000000>; |
| 291 | interrupt-parent = <&mpic>; |
| 292 | interrupts = <6 1>; |
| 293 | }; |
| 294 | |
| 295 | fpga_pic: fpga-pic@3,10 { |
| 296 | compatible = "abb,socrates-fpga-pic"; |
| 297 | reg = <3 0x10 0x10>; |
| 298 | interrupt-controller; |
| 299 | /* IRQs 2, 10, 11, active low, level-sensitive */ |
| 300 | interrupts = <2 1 10 1 11 1>; |
| 301 | interrupt-parent = <&mpic>; |
| 302 | #interrupt-cells = <3>; |
| 303 | }; |
| 304 | |
| 305 | spi@3,60 { |
| 306 | compatible = "abb,socrates-spi"; |
| 307 | reg = <3 0x60 0x10>; |
| 308 | interrupts = <8 4 0>; // number, type, routing |
| 309 | interrupt-parent = <&fpga_pic>; |
| 310 | }; |
| 311 | |
| 312 | nand@3,70 { |
| 313 | compatible = "abb,socrates-nand"; |
| 314 | reg = <3 0x70 0x04>; |
| 315 | bank-width = <1>; |
| 316 | #address-cells = <1>; |
| 317 | #size-cells = <1>; |
| 318 | data@0 { |
| 319 | label = "data"; |
| 320 | reg = <0x0 0x40000000>; |
| 321 | }; |
| 322 | }; |
| 323 | |
| 324 | can@3,100 { |
| 325 | compatible = "philips,sja1000"; |
| 326 | reg = <3 0x100 0x80>; |
| 327 | interrupts = <2 8 1>; // number, type, routing |
| 328 | interrupt-parent = <&fpga_pic>; |
| 329 | }; |
| 330 | }; |
| 331 | |
| 332 | pci0: pci@e0008000 { |
| 333 | #interrupt-cells = <1>; |
| 334 | #size-cells = <2>; |
| 335 | #address-cells = <3>; |
| 336 | compatible = "fsl,mpc8540-pci"; |
| 337 | device_type = "pci"; |
| 338 | reg = <0xe0008000 0x1000>; |
| 339 | clock-frequency = <66666666>; |
| 340 | |
| 341 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 342 | interrupt-map = < |
| 343 | /* IDSEL 0x11 */ |
| 344 | 0x8800 0x0 0x0 1 &mpic 5 1 |
| 345 | /* IDSEL 0x12 */ |
| 346 | 0x9000 0x0 0x0 1 &mpic 4 1>; |
| 347 | interrupt-parent = <&mpic>; |
| 348 | interrupts = <24 2>; |
| 349 | bus-range = <0x0 0x0>; |
| 350 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 |
| 351 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; |
| 352 | }; |
| 353 | |
| 354 | }; |