wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 1 | /* originally from linux source. |
| 2 | * removed the dependencies on CONFIG_ values |
| 3 | * removed virt_to_phys stuff (and in fact everything surrounded by #if __KERNEL__) |
| 4 | * Modified By Rob Taylor, Flying Pig Systems, 2000 |
| 5 | */ |
| 6 | |
| 7 | #ifndef _PPC_IO_H |
| 8 | #define _PPC_IO_H |
| 9 | |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 10 | #include <asm/byteorder.h> |
| 11 | |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 12 | #ifdef CONFIG_ADDR_MAP |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 13 | #include <asm/global_data.h> |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 14 | #include <addr_map.h> |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 15 | |
| 16 | DECLARE_GLOBAL_DATA_PTR; |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 17 | #endif |
| 18 | |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 19 | #define SIO_CONFIG_RA 0x398 |
| 20 | #define SIO_CONFIG_RD 0x399 |
| 21 | |
Heiko Schocher | f98984c | 2007-08-28 17:39:14 +0200 | [diff] [blame] | 22 | #ifndef _IO_BASE |
| 23 | #define _IO_BASE 0 |
| 24 | #endif |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 25 | |
| 26 | #define readb(addr) in_8((volatile u8 *)(addr)) |
| 27 | #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) |
| 28 | #if !defined(__BIG_ENDIAN) |
| 29 | #define readw(addr) (*(volatile u16 *) (addr)) |
| 30 | #define readl(addr) (*(volatile u32 *) (addr)) |
| 31 | #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b)) |
| 32 | #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b)) |
| 33 | #else |
| 34 | #define readw(addr) in_le16((volatile u16 *)(addr)) |
| 35 | #define readl(addr) in_le32((volatile u32 *)(addr)) |
| 36 | #define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) |
| 37 | #define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) |
| 38 | #endif |
| 39 | |
| 40 | /* |
| 41 | * The insw/outsw/insl/outsl macros don't do byte-swapping. |
| 42 | * They are only used in practice for transferring buffers which |
| 43 | * are arrays of bytes, and byte-swapping is not appropriate in |
| 44 | * that case. - paulus |
| 45 | */ |
| 46 | #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) |
| 47 | #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) |
| 48 | #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) |
| 49 | #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) |
| 50 | #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) |
| 51 | #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) |
| 52 | |
| 53 | #define inb(port) in_8((u8 *)((port)+_IO_BASE)) |
| 54 | #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) |
| 55 | #if !defined(__BIG_ENDIAN) |
| 56 | #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) |
| 57 | #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) |
| 58 | #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) |
| 59 | #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) |
| 60 | #else |
| 61 | #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) |
| 62 | #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) |
| 63 | #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) |
| 64 | #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) |
| 65 | #endif |
| 66 | |
| 67 | #define inb_p(port) in_8((u8 *)((port)+_IO_BASE)) |
| 68 | #define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) |
| 69 | #define inw_p(port) in_le16((u16 *)((port)+_IO_BASE)) |
| 70 | #define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) |
| 71 | #define inl_p(port) in_le32((u32 *)((port)+_IO_BASE)) |
| 72 | #define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) |
| 73 | |
| 74 | extern void _insb(volatile u8 *port, void *buf, int ns); |
| 75 | extern void _outsb(volatile u8 *port, const void *buf, int ns); |
| 76 | extern void _insw(volatile u16 *port, void *buf, int ns); |
| 77 | extern void _outsw(volatile u16 *port, const void *buf, int ns); |
| 78 | extern void _insl(volatile u32 *port, void *buf, int nl); |
| 79 | extern void _outsl(volatile u32 *port, const void *buf, int nl); |
| 80 | extern void _insw_ns(volatile u16 *port, void *buf, int ns); |
| 81 | extern void _outsw_ns(volatile u16 *port, const void *buf, int ns); |
| 82 | extern void _insl_ns(volatile u32 *port, void *buf, int nl); |
| 83 | extern void _outsl_ns(volatile u32 *port, const void *buf, int nl); |
| 84 | |
| 85 | /* |
| 86 | * The *_ns versions below don't do byte-swapping. |
| 87 | * Neither do the standard versions now, these are just here |
| 88 | * for older code. |
| 89 | */ |
| 90 | #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) |
| 91 | #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) |
| 92 | #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) |
| 93 | #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) |
| 94 | |
| 95 | |
| 96 | #define IO_SPACE_LIMIT ~0 |
| 97 | |
Christophe Leroy | 3febc89 | 2023-05-05 07:24:16 +0200 | [diff] [blame] | 98 | #define memset_io(a,b,c) memset((void __force *)(a),(b),(c)) |
| 99 | #define memcpy_fromio(a,b,c) memcpy((a),(void __force *)(b),(c)) |
| 100 | #define memcpy_toio(a,b,c) memcpy((void __force *)(a),(b),(c)) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 101 | |
| 102 | /* |
| 103 | * Enforce In-order Execution of I/O: |
| 104 | * Acts as a barrier to ensure all previous I/O accesses have |
| 105 | * completed before any further ones are issued. |
| 106 | */ |
Haiying Wang | 3a197b2 | 2007-02-21 16:52:31 +0100 | [diff] [blame] | 107 | static inline void eieio(void) |
| 108 | { |
| 109 | __asm__ __volatile__ ("eieio" : : : "memory"); |
| 110 | } |
| 111 | |
| 112 | static inline void sync(void) |
| 113 | { |
| 114 | __asm__ __volatile__ ("sync" : : : "memory"); |
| 115 | } |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 116 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 117 | static inline void isync(void) |
| 118 | { |
| 119 | __asm__ __volatile__ ("isync" : : : "memory"); |
| 120 | } |
| 121 | |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 122 | /* Enforce in-order execution of data I/O. |
| 123 | * No distinction between read/write on PPC; use eieio for all three. |
| 124 | */ |
| 125 | #define iobarrier_rw() eieio() |
| 126 | #define iobarrier_r() eieio() |
| 127 | #define iobarrier_w() eieio() |
| 128 | |
York Sun | 8340e7a | 2014-06-23 15:36:44 -0700 | [diff] [blame] | 129 | #define mb() sync() |
| 130 | #define isb() isync() |
| 131 | |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 132 | /* |
Haavard Skinnemoen | 812711c | 2007-12-13 12:56:31 +0100 | [diff] [blame] | 133 | * Non ordered and non-swapping "raw" accessors |
| 134 | */ |
Haavard Skinnemoen | 812711c | 2007-12-13 12:56:31 +0100 | [diff] [blame] | 135 | #define PCI_FIX_ADDR(addr) (addr) |
| 136 | |
| 137 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
| 138 | { |
| 139 | return *(volatile unsigned char *)PCI_FIX_ADDR(addr); |
| 140 | } |
| 141 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) |
| 142 | { |
| 143 | return *(volatile unsigned short *)PCI_FIX_ADDR(addr); |
| 144 | } |
| 145 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) |
| 146 | { |
| 147 | return *(volatile unsigned int *)PCI_FIX_ADDR(addr); |
| 148 | } |
| 149 | static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) |
| 150 | { |
| 151 | *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v; |
| 152 | } |
| 153 | static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) |
| 154 | { |
| 155 | *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v; |
| 156 | } |
| 157 | static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) |
| 158 | { |
| 159 | *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v; |
| 160 | } |
| 161 | |
| 162 | /* |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 163 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 164 | * |
| 165 | * Read operations have additional twi & isync to make sure the read |
| 166 | * is actually performed (i.e. the data has come back) before we start |
| 167 | * executing any following instructions. |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 168 | */ |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 169 | static inline u8 in_8(const volatile unsigned char __iomem *addr) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 170 | { |
Prabhakar Kushwaha | a16a5cc | 2012-04-10 22:48:59 +0000 | [diff] [blame] | 171 | u8 ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 172 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 173 | __asm__ __volatile__( |
| 174 | "sync; lbz%U1%X1 %0,%1;\n" |
| 175 | "twi 0,%0,0;\n" |
| 176 | "isync" : "=r" (ret) : "m" (*addr)); |
| 177 | return ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 178 | } |
| 179 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 180 | static inline void out_8(volatile unsigned char __iomem *addr, u8 val) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 181 | { |
Timur Tabi | 1fade70 | 2010-12-03 09:03:46 +0000 | [diff] [blame] | 182 | __asm__ __volatile__("sync;\n" |
| 183 | "stb%U0%X0 %1,%0;\n" |
| 184 | : "=m" (*addr) |
| 185 | : "r" (val)); |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 186 | } |
| 187 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 188 | static inline u16 in_le16(const volatile unsigned short __iomem *addr) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 189 | { |
Prabhakar Kushwaha | a16a5cc | 2012-04-10 22:48:59 +0000 | [diff] [blame] | 190 | u16 ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 191 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 192 | __asm__ __volatile__("sync; lhbrx %0,0,%1;\n" |
| 193 | "twi 0,%0,0;\n" |
| 194 | "isync" : "=r" (ret) : |
| 195 | "r" (addr), "m" (*addr)); |
| 196 | return ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 197 | } |
| 198 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 199 | static inline u16 in_be16(const volatile unsigned short __iomem *addr) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 200 | { |
Prabhakar Kushwaha | a16a5cc | 2012-04-10 22:48:59 +0000 | [diff] [blame] | 201 | u16 ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 202 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 203 | __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n" |
| 204 | "twi 0,%0,0;\n" |
| 205 | "isync" : "=r" (ret) : "m" (*addr)); |
| 206 | return ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 207 | } |
| 208 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 209 | static inline void out_le16(volatile unsigned short __iomem *addr, u16 val) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 210 | { |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 211 | __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) : |
| 212 | "r" (val), "r" (addr)); |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 213 | } |
| 214 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 215 | static inline void out_be16(volatile unsigned short __iomem *addr, u16 val) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 216 | { |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 217 | __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 218 | } |
| 219 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 220 | static inline u32 in_le32(const volatile unsigned __iomem *addr) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 221 | { |
Prabhakar Kushwaha | a16a5cc | 2012-04-10 22:48:59 +0000 | [diff] [blame] | 222 | u32 ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 223 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 224 | __asm__ __volatile__("sync; lwbrx %0,0,%1;\n" |
| 225 | "twi 0,%0,0;\n" |
| 226 | "isync" : "=r" (ret) : |
| 227 | "r" (addr), "m" (*addr)); |
| 228 | return ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 229 | } |
| 230 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 231 | static inline u32 in_be32(const volatile unsigned __iomem *addr) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 232 | { |
Prabhakar Kushwaha | a16a5cc | 2012-04-10 22:48:59 +0000 | [diff] [blame] | 233 | u32 ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 234 | |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 235 | __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n" |
| 236 | "twi 0,%0,0;\n" |
| 237 | "isync" : "=r" (ret) : "m" (*addr)); |
| 238 | return ret; |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 239 | } |
| 240 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 241 | static inline void out_le32(volatile unsigned __iomem *addr, u32 val) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 242 | { |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 243 | __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) : |
| 244 | "r" (val), "r" (addr)); |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 245 | } |
| 246 | |
Måns Rullgård | 44d0677 | 2015-11-06 12:44:01 +0000 | [diff] [blame] | 247 | static inline void out_be32(volatile unsigned __iomem *addr, u32 val) |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 248 | { |
Stefan Roese | 53ad021 | 2007-06-01 15:16:58 +0200 | [diff] [blame] | 249 | __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 250 | } |
| 251 | |
Wolfgang Grandegger | 3984151 | 2008-06-04 12:45:22 +0200 | [diff] [blame] | 252 | /* Clear and set bits in one shot. These macros can be used to clear and |
| 253 | * set multiple bits in a register using a single call. These macros can |
| 254 | * also be used to set a multiple-bit bit pattern using a mask, by |
| 255 | * specifying the mask in the 'clear' parameter and the new bit pattern |
| 256 | * in the 'set' parameter. |
| 257 | */ |
| 258 | |
| 259 | #define clrbits(type, addr, clear) \ |
| 260 | out_##type((addr), in_##type(addr) & ~(clear)) |
| 261 | |
| 262 | #define setbits(type, addr, set) \ |
| 263 | out_##type((addr), in_##type(addr) | (set)) |
| 264 | |
| 265 | #define clrsetbits(type, addr, clear, set) \ |
| 266 | out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) |
| 267 | |
| 268 | #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) |
| 269 | #define setbits_be32(addr, set) setbits(be32, addr, set) |
| 270 | #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) |
| 271 | |
| 272 | #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) |
| 273 | #define setbits_le32(addr, set) setbits(le32, addr, set) |
| 274 | #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) |
| 275 | |
| 276 | #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) |
| 277 | #define setbits_be16(addr, set) setbits(be16, addr, set) |
| 278 | #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) |
| 279 | |
| 280 | #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) |
| 281 | #define setbits_le16(addr, set) setbits(le16, addr, set) |
| 282 | #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) |
| 283 | |
| 284 | #define clrbits_8(addr, clear) clrbits(8, addr, clear) |
| 285 | #define setbits_8(addr, set) setbits(8, addr, set) |
| 286 | #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) |
| 287 | |
Mario Six | 08f5b0b | 2018-08-06 10:23:31 +0200 | [diff] [blame] | 288 | #define readb_be(addr) \ |
| 289 | __raw_readb((__force unsigned *)(addr)) |
| 290 | #define readw_be(addr) \ |
| 291 | be16_to_cpu(__raw_readw((__force unsigned *)(addr))) |
| 292 | #define readl_be(addr) \ |
| 293 | be32_to_cpu(__raw_readl((__force unsigned *)(addr))) |
| 294 | #define readq_be(addr) \ |
| 295 | be64_to_cpu(__raw_readq((__force unsigned *)(addr))) |
| 296 | |
| 297 | #define writeb_be(val, addr) \ |
| 298 | __raw_writeb((val), (__force unsigned *)(addr)) |
| 299 | #define writew_be(val, addr) \ |
| 300 | __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr)) |
| 301 | #define writel_be(val, addr) \ |
| 302 | __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr)) |
| 303 | #define writeq_be(val, addr) \ |
| 304 | __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr)) |
| 305 | |
Paul Burton | ae07d60 | 2017-09-14 15:05:12 -0700 | [diff] [blame] | 306 | static inline void *phys_to_virt(phys_addr_t paddr) |
Haavard Skinnemoen | 4d7d693 | 2007-12-13 12:56:33 +0100 | [diff] [blame] | 307 | { |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 308 | #ifdef CONFIG_ADDR_MAP |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 309 | if (gd->flags & GD_FLG_RELOC) |
| 310 | return addrmap_phys_to_virt(paddr); |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 311 | #endif |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 312 | return (void *)((unsigned long)paddr); |
Haavard Skinnemoen | 4d7d693 | 2007-12-13 12:56:33 +0100 | [diff] [blame] | 313 | } |
Paul Burton | ae07d60 | 2017-09-14 15:05:12 -0700 | [diff] [blame] | 314 | #define phys_to_virt phys_to_virt |
Haavard Skinnemoen | 4d7d693 | 2007-12-13 12:56:33 +0100 | [diff] [blame] | 315 | |
Kumar Gala | 65e43a1 | 2008-12-13 17:20:27 -0600 | [diff] [blame] | 316 | static inline phys_addr_t virt_to_phys(void * vaddr) |
| 317 | { |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 318 | #ifdef CONFIG_ADDR_MAP |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 319 | if (gd->flags & GD_FLG_RELOC) |
| 320 | return addrmap_virt_to_phys(vaddr); |
Kumar Gala | 77c8115 | 2008-12-16 14:59:21 -0600 | [diff] [blame] | 321 | #endif |
Bin Meng | 3320656 | 2021-02-25 17:22:37 +0800 | [diff] [blame] | 322 | return (phys_addr_t)((unsigned long)vaddr); |
Kumar Gala | 65e43a1 | 2008-12-13 17:20:27 -0600 | [diff] [blame] | 323 | } |
Paul Burton | ae07d60 | 2017-09-14 15:05:12 -0700 | [diff] [blame] | 324 | #define virt_to_phys virt_to_phys |
| 325 | |
| 326 | #include <asm-generic/io.h> |
Kumar Gala | 65e43a1 | 2008-12-13 17:20:27 -0600 | [diff] [blame] | 327 | |
wdenk | 041b1de | 2002-09-07 21:30:09 +0000 | [diff] [blame] | 328 | #endif |