wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 1 | /* |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 2 | * Copyright (C) 2004-2005 Arabella Software Ltd. |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 3 | * Yuli Barcohen <yuli@arabellasw.com> |
| 4 | * |
| 5 | * Support for Analogue&Micro Adder boards family. |
| 6 | * Tested on AdderII and Adder87x. |
| 7 | * |
Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 9 | */ |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | #if !defined(CONFIG_MPC875) && !defined(CONFIG_MPC852T) |
| 14 | #define CONFIG_MPC875 |
| 15 | #endif |
| 16 | |
| 17 | #define CONFIG_ADDER /* Analogue&Micro Adder board */ |
| 18 | |
Wolfgang Denk | 2ae1824 | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 19 | #define CONFIG_SYS_TEXT_BASE 0xFE000000 |
| 20 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 21 | #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ |
| 22 | #define CONFIG_BAUDRATE 38400 |
| 23 | |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 24 | #define CONFIG_ETHER_ON_FEC1 |
| 25 | #define CONFIG_ETHER_ON_FEC2 |
Bryan O'Donoghue | a6f5f31 | 2008-02-15 01:05:58 +0000 | [diff] [blame] | 26 | #define CONFIG_HAS_ETH0 |
| 27 | #define CONFIG_HAS_ETH1 |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 28 | |
| 29 | #if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 30 | #define CONFIG_SYS_DISCOVER_PHY |
TsiChung Liew | 0f3ba7e | 2008-03-30 01:22:13 -0500 | [diff] [blame] | 31 | #define CONFIG_MII_INIT 1 |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 32 | #define FEC_ENET |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 33 | #endif /* CONFIG_ETHER_ON_FEC || CONFIG_ETHER_ON_FEC2 */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 34 | |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 35 | #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */ |
| 36 | #define CONFIG_8xx_CPUCLK_DEFAULT 50000000 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 37 | #define CONFIG_SYS_8xx_CPUCLK_MIN 40000000 |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 38 | #ifdef CONFIG_MPC852T |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 39 | #define CONFIG_SYS_8xx_CPUCLK_MAX 50000000 |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 40 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 41 | #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 42 | #endif /* CONFIG_MPC852T */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 43 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 44 | |
Jon Loeliger | 498ff9a | 2007-07-05 19:13:52 -0500 | [diff] [blame] | 45 | /* |
Jon Loeliger | 1179943 | 2007-07-10 09:02:57 -0500 | [diff] [blame] | 46 | * BOOTP options |
| 47 | */ |
| 48 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 49 | #define CONFIG_BOOTP_BOOTPATH |
| 50 | #define CONFIG_BOOTP_GATEWAY |
| 51 | #define CONFIG_BOOTP_HOSTNAME |
| 52 | |
| 53 | |
| 54 | /* |
Jon Loeliger | 498ff9a | 2007-07-05 19:13:52 -0500 | [diff] [blame] | 55 | * Command line configuration. |
| 56 | */ |
| 57 | #include <config_cmd_default.h> |
| 58 | |
Wolfgang Denk | 5728be3 | 2007-08-06 01:01:49 +0200 | [diff] [blame] | 59 | #define CONFIG_CMD_DHCP |
| 60 | #define CONFIG_CMD_IMMAP |
| 61 | #define CONFIG_CMD_MII |
| 62 | #define CONFIG_CMD_PING |
Jon Loeliger | 498ff9a | 2007-07-05 19:13:52 -0500 | [diff] [blame] | 63 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 64 | |
| 65 | #define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */ |
| 66 | #define CONFIG_BOOTCOMMAND "bootm fe040000" /* Autoboot command */ |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 67 | #define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=1M(ROM)ro,-(root)" |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 68 | |
| 69 | #define CONFIG_BZIP2 /* Include support for bzip2 compressed images */ |
| 70 | #undef CONFIG_WATCHDOG /* Disable platform specific watchdog */ |
| 71 | |
| 72 | /*----------------------------------------------------------------------- |
| 73 | * Miscellaneous configurable options |
| 74 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 75 | #define CONFIG_SYS_HUSH_PARSER |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_LONGHELP /* #undef to save memory */ |
| 77 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 78 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ |
| 79 | #define CONFIG_SYS_MAXARGS 16 /* Max number of command args */ |
| 80 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 81 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 82 | #define CONFIG_SYS_LOAD_ADDR 0x400000 /* Default load address */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 83 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 84 | /*----------------------------------------------------------------------- |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | * RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 86 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 88 | #define CONFIG_SYS_SDRAM_MAX_SIZE 0x01000000 /* Up to 16 Mbyte */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 89 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | #define CONFIG_SYS_MAMR 0x00002114 |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 91 | |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 92 | /* |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 93 | * 4096 Up to 4096 SDRAM rows |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 94 | * 1000 factor s -> ms |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 95 | * 32 PTP (pre-divider from MPTPR) |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 96 | * 4 Number of refresh cycles per period |
| 97 | * 64 Refresh cycle in ms per number of rows |
| 98 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64)) |
wdenk | 66ca92a | 2004-09-28 17:59:53 +0000 | [diff] [blame] | 100 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
| 102 | #define CONFIG_SYS_MEMTEST_END 0x00500000 /* 1 ... 5 MB in SDRAM */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 103 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 104 | #define CONFIG_SYS_RESET_ADDRESS 0x09900000 |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 105 | |
| 106 | /*----------------------------------------------------------------------- |
| 107 | * For booting Linux, the board info and command line data |
| 108 | * have to be in the first 8 MB of memory, since this is |
| 109 | * the maximum mapped by the Linux kernel during initialization. |
| 110 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 111 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 112 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 113 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 115 | #ifdef CONFIG_BZIP2 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | #define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 117 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 119 | #endif /* CONFIG_BZIP2 */ |
| 120 | |
| 121 | /*----------------------------------------------------------------------- |
| 122 | * Flash organisation |
| 123 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 |
| 125 | #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 126 | #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ |
| 128 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max num of sects on one chip */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 129 | |
| 130 | /* Environment is in flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 131 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 132 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* We use one complete sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 134 | |
Wolfgang Denk | 5797b82 | 2006-03-12 01:43:03 +0100 | [diff] [blame] | 135 | #define CONFIG_ENV_OVERWRITE |
| 136 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_OR0_PRELIM 0xFF000774 |
| 138 | #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_16 | BR_MS_GPCM | BR_V) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 139 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #define CONFIG_SYS_DIRECT_FLASH_TFTP |
wdenk | 2623813 | 2004-07-09 22:51:01 +0000 | [diff] [blame] | 141 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 142 | /*----------------------------------------------------------------------- |
| 143 | * Internal Memory Map Register |
| 144 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | #define CONFIG_SYS_IMMR 0xFF000000 |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 146 | |
| 147 | /*----------------------------------------------------------------------- |
| 148 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 149 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */ |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 152 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 154 | |
| 155 | /*----------------------------------------------------------------------- |
| 156 | * Configuration registers |
| 157 | */ |
| 158 | #ifdef CONFIG_WATCHDOG |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 160 | SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | \ |
| 161 | SYPCR_SWP) |
| 162 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 164 | SYPCR_SWF | SYPCR_SWP) |
| 165 | #endif /* CONFIG_WATCHDOG */ |
| 166 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 167 | #define CONFIG_SYS_SIUMCR (SIUMCR_MLRC01 | SIUMCR_DBGC11) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 168 | |
| 169 | /* TBSCR - Time Base Status and Control Register */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 170 | #define CONFIG_SYS_TBSCR (TBSCR_TBF | TBSCR_TBE) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 171 | |
| 172 | /* PISCR - Periodic Interrupt Status and Control */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF) |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 174 | |
| 175 | /* PLPRCR - PLL, Low-Power, and Reset Control Register */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 176 | /* #define CONFIG_SYS_PLPRCR PLPRCR_TEXPS */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 177 | |
| 178 | /* SCCR - System Clock and reset Control Register */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 179 | #define SCCR_MASK SCCR_EBDF11 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 180 | #define CONFIG_SYS_SCCR SCCR_RTSEL |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 181 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_DER 0 |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 183 | |
| 184 | /*----------------------------------------------------------------------- |
| 185 | * Cache Configuration |
| 186 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 188 | |
Bryan O'Donoghue | a6f5f31 | 2008-02-15 01:05:58 +0000 | [diff] [blame] | 189 | /* pass open firmware flat tree */ |
| 190 | #define CONFIG_OF_LIBFDT 1 |
| 191 | #define CONFIG_OF_BOARD_SETUP 1 |
| 192 | |
wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame] | 193 | #endif /* __CONFIG_H */ |