blob: 67154353d331e83d00d661d8fa94dc6c5f050e3b [file] [log] [blame]
Stefan Roeseb79316f2005-08-15 12:31:23 +02001/*
2 * (C) Copyright 2004 Sandburst Corporation
3 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
Stefan Roeseb79316f2005-08-15 12:31:23 +02005 */
6
7/************************************************************************
8 * METROBOX.h - configuration Sandburst MetroBox
9 ***********************************************************************/
10
11/*
12 * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
13 *
14 *
15 * $Log: METROBOX.h,v $
16 * Revision 1.21 2005/06/03 15:05:25 tsawyer
17 * MB rev 2.0.3 KA rev 0.0.7. Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
18 *
19 * Revision 1.20 2005/04/11 20:51:11 tsawyer
20 * fix ethernet
21 *
22 * Revision 1.19 2005/04/06 15:13:36 tsawyer
23 * Update appropriate files to coincide with u-boot 1.1.3
24 *
25 * Revision 1.18 2005/03/10 14:16:02 tsawyer
26 * add def'n for cis8201 short etch option.
27 *
28 * Revision 1.17 2005/03/09 19:49:51 tsawyer
29 * Remove KGDB to allow use of 2nd serial port
30 *
31 * Revision 1.16 2004/12/02 19:00:23 tsawyer
32 * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
33 *
34 * Revision 1.15 2004/09/15 18:04:12 tsawyer
35 * add multiple serial port support
36 *
37 * Revision 1.14 2004/09/03 15:27:51 tsawyer
38 * All metrobox boards are at 66.66 sys clock
39 *
40 * Revision 1.13 2004/08/05 20:27:46 tsawyer
41 * Remove system ace definitions, add net console support
42 *
43 * Revision 1.12 2004/07/29 20:00:13 tsawyer
44 * Add i2c bus 1
45 *
46 * Revision 1.11 2004/07/21 13:44:18 tsawyer
47 * SystemACE is out, CF direct to local bus is in
48 *
49 * Revision 1.10 2004/06/29 19:08:55 tsawyer
50 * Add CONFIG_MISC_INIT_R
51 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020052 * Revision 1.9 2004/06/28 21:30:53 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020053 * Fix default BOOTARGS
54 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020055 * Revision 1.8 2004/06/17 15:51:08 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020056 * auto complete
57 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020058 * Revision 1.7 2004/06/17 15:08:49 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020059 * Add autocomplete
60 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020061 * Revision 1.6 2004/06/15 12:33:57 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020062 * debugging checkpoint
63 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020064 * Revision 1.5 2004/06/12 19:48:28 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020065 * Debugging checkpoint
66 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020067 * Revision 1.4 2004/06/02 13:03:06 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020068 * Fix eth addrs
69 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020070 * Revision 1.3 2004/05/18 19:56:10 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020071 * Change default bootcommand to pImage.metrobox
72 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020073 * Revision 1.2 2004/05/18 14:13:44 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020074 * Add bringup values for bootargs and bootcommand.
75 * Remove definition of ipaddress and serverip addresses.
76 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020077 * Revision 1.1 2004/04/16 15:08:54 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020078 * Initial Revision
79 *
80 *
81 */
82
83#ifndef __CONFIG_H
84#define __CONFIG_H
85
86/*-----------------------------------------------------------------------
87 * High Level Configuration Options
88 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020089#define CONFIG_METROBOX 1 /* Board is Metrobox */
90#define CONFIG_440GX 1 /* Specifc GX support */
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +020091#define CONFIG_440 1 /* ... PPC440 family */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020092#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roeseb79316f2005-08-15 12:31:23 +020093#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020094#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
95#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
Wolfgang Denk2ae18242010-10-06 09:05:45 +020096
97#define CONFIG_SYS_TEXT_BASE 0xFFF80000
98
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200100#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200101
102#define CONFIG_VERY_BIG_RAM 1
103#define CONFIG_VERSION_VARIABLE
104
105#define CONFIG_IDENT_STRING " Sandburst Metrobox"
106
107/*-----------------------------------------------------------------------
108 * Base addresses -- Note these are effective addresses where the
109 * actual resources get mapped (not physical addresses)
110 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
112#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
113#define CONFIG_SYS_MONITOR_BASE 0xfff80000 /* start of monitor */
114#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
116#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200117
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
119#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000)
120#define CONFIG_SYS_BME32_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000)
121#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200122
123/*-----------------------------------------------------------------------
124 * Initial RAM & stack pointer (placed in internal SRAM)
125 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_TEMP_STACK_OCM 1
127#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
128#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200129#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200130
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200131#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +0200132#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
135#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200136
137/*-----------------------------------------------------------------------
138 * Serial Port
139 *----------------------------------------------------------------------*/
Stefan Roese550650d2010-09-20 16:05:31 +0200140#define CONFIG_CONS_INDEX 1 /* Use UART0 */
141#define CONFIG_SYS_NS16550
142#define CONFIG_SYS_NS16550_SERIAL
143#define CONFIG_SYS_NS16550_REG_SIZE 1
144#define CONFIG_SYS_NS16550_CLK get_serial_clock()
Stefan Roeseb79316f2005-08-15 12:31:23 +0200145#define CONFIG_BAUDRATE 9600
146
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_BAUDRATE_TABLE \
Stefan Roeseb79316f2005-08-15 12:31:23 +0200148 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
149
150/*-----------------------------------------------------------------------
151 * NVRAM/RTC
152 *
153 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
154 * The DS1743 code assumes this condition (i.e. -- it assumes the base
155 * address for the RTC registers is:
156 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200157 * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
Stefan Roeseb79316f2005-08-15 12:31:23 +0200158 *
159 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200161#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200162
163/*-----------------------------------------------------------------------
164 * FLASH related
165 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
167#define CONFIG_SYS_MAX_FLASH_SECT 8 /* sectors per device */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200168
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#undef CONFIG_SYS_FLASH_CHECKSUM
170#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Flash Erase TO (in ms) */
171#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO(in ms) */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200172
173/*-----------------------------------------------------------------------
174 * DDR SDRAM
175 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200176#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup*/
177#define SPD_EEPROM_ADDRESS {0x53} /* SPD i2c spd addresses */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200178
179/*-----------------------------------------------------------------------
180 * I2C
181 *----------------------------------------------------------------------*/
Dirk Eibach880540d2013-04-25 02:40:01 +0000182#define CONFIG_SYS_I2C
183#define CONFIG_SYS_I2C_PPC4XX
184#define CONFIG_SYS_I2C_PPC4XX_CH0
185#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
186#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
187#define CONFIG_SYS_I2C_PPC4XX_CH1
188#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
189#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
190#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200191
192/*-----------------------------------------------------------------------
193 * Environment
194 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200195#define CONFIG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200196#undef CONFIG_ENV_IS_IN_FLASH /* ... not in flash */
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200197#undef CONFIG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200198#define CONFIG_ENV_OVERWRITE 1 /* allow env overwrite */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200199
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200200#define CONFIG_ENV_SIZE 0x1000 /* Size of Env vars */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#define CONFIG_ENV_ADDR (CONFIG_SYS_NVRAM_BASE_ADDR)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200202
203#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
204#define CONFIG_BOOTCOMMAND "tftp 8000000 pImage.metrobox;bootm 8000000"
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200205#define CONFIG_BOOTDELAY 5 /* disable autoboot */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200206
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200207#define CONFIG_LOADS_ECHO 1 /* echo on for serial dnld */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200209
210/*-----------------------------------------------------------------------
211 * Networking
212 *----------------------------------------------------------------------*/
Ben Warren96e21f82008-10-27 23:50:15 -0700213#define CONFIG_PPC4xx_EMAC
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200214#define CONFIG_MII 1 /* MII PHY management */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200215#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
216#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
217#define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */
218#define CONFIG_PHY3_ADDR 0x18 /* PHY addr, LCL, EMAC3 */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200219#define CONFIG_HAS_ETH0
220#define CONFIG_HAS_ETH1
221#define CONFIG_HAS_ETH2
222#define CONFIG_HAS_ETH3
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200223#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200224#define CONFIG_CIS8201_PHY 1 /* RGMII mode for Cicada */
225#define CONFIG_CIS8201_SHORT_ETCH 1 /* Use short etch mode */
226#define CONFIG_PHY_GIGE 1 /* GbE speed/duplex detect */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200227#define CONFIG_PHY_RESET_DELAY 1000
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200228#define CONFIG_NETMASK 255.255.0.0
229#define CONFIG_ETHADDR 00:00:00:00:00:00 /* No EMAC 0 support */
230#define CONFIG_ETH1ADDR 00:00:00:00:00:00 /* No EMAC 1 support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200231#define CONFIG_SYS_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200232
233
Jon Loeliger8353e132007-07-08 14:14:17 -0500234/*
Jon Loeliger659e2f62007-07-10 09:10:49 -0500235 * BOOTP options
236 */
237#define CONFIG_BOOTP_BOOTFILESIZE
238#define CONFIG_BOOTP_BOOTPATH
239#define CONFIG_BOOTP_GATEWAY
240#define CONFIG_BOOTP_HOSTNAME
241
242
243/*
Jon Loeliger8353e132007-07-08 14:14:17 -0500244 * Command line configuration.
245 */
246#include <config_cmd_default.h>
Stefan Roeseb79316f2005-08-15 12:31:23 +0200247
Jon Loeliger8353e132007-07-08 14:14:17 -0500248#define CONFIG_CMD_PCI
249#define CONFIG_CMD_IRQ
250#define CONFIG_CMD_I2C
251#define CONFIG_CMD_DHCP
252#define CONFIG_CMD_DATE
253#define CONFIG_CMD_BEDBUG
254#define CONFIG_CMD_PING
255#define CONFIG_CMD_DIAG
256#define CONFIG_CMD_MII
257#define CONFIG_CMD_NET
258#define CONFIG_CMD_ELF
259#define CONFIG_CMD_IDE
260#define CONFIG_CMD_FAT
Stefan Roeseb79316f2005-08-15 12:31:23 +0200261
262
263/* Include NetConsole support */
264#define CONFIG_NETCONSOLE
265
266/* Include auto complete with tabs */
267#define CONFIG_AUTO_COMPLETE 1
Wolfgang Denk8078f1a2006-10-28 02:28:02 +0200268#define CONFIG_AUTO_COMPLETE 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200269#define CONFIG_SYS_ALT_MEMTEST 1 /* use real memory test */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200270
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200271#define CONFIG_SYS_LONGHELP /* undef to save memory */
272#define CONFIG_SYS_PROMPT "MetroBox=> " /* Monitor Command Prompt */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200273
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_HUSH_PARSER 1 /* HUSH for ext'd cli */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200275
276
277/*-----------------------------------------------------------------------
278 * Console Buffer
279 *----------------------------------------------------------------------*/
Jon Loeliger8353e132007-07-08 14:14:17 -0500280#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200282#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200283#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200284#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200285#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200286 /* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200287#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
288#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200289
290/*-----------------------------------------------------------------------
291 * Memory Test
292 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
294#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200295
296/*-----------------------------------------------------------------------
297 * Compact Flash (in true IDE mode)
298 *----------------------------------------------------------------------*/
299#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
300#undef CONFIG_IDE_LED /* no led for ide supported */
301
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200302#define CONFIG_IDE_RESET /* reset for ide supported */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200303#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE busses */
304#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200305
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200306#define CONFIG_SYS_ATA_BASE_ADDR 0xF0000000
307#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
308#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
309#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses*/
310#define CONFIG_SYS_ATA_ALT_OFFSET 0x100000 /* Offset for alternate registers */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200311
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312#define CONFIG_SYS_ATA_STRIDE 2 /* Directly connected CF, needs a stride
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200313 to get to the correct offset */
314#define CONFIG_DOS_PARTITION 1 /* Include dos partition */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200315
316/*-----------------------------------------------------------------------
317 * PCI
318 *----------------------------------------------------------------------*/
319/* General PCI */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200320#define CONFIG_PCI /* include pci support */
Gabor Juhos842033e2013-05-30 07:06:12 +0000321#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200322#define CONFIG_PCI_PNP /* do pci plug-and-play */
323#define CONFIG_PCI_SCAN_SHOW /* show pci devices */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200324#define CONFIG_SYS_PCI_TARGBASE (CONFIG_SYS_PCI_MEMBASE)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200325
326/* Board-specific PCI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200327#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target*/
Stefan Roeseb79316f2005-08-15 12:31:23 +0200328
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200329#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
330#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200331
332/*
333 * For booting Linux, the board info and command line data
334 * have to be in the first 8 MB of memory, since this is
335 * the maximum mapped by the Linux kernel during initialization.
336 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200337#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200338
Jon Loeliger8353e132007-07-08 14:14:17 -0500339#if defined(CONFIG_CMD_KGDB)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200340#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200341#endif
342
343/*-----------------------------------------------------------------------
344 * Miscellaneous configurable options
345 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200346#undef CONFIG_WATCHDOG /* watchdog disabled */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347#define CONFIG_SYS_LOAD_ADDR 0x8000000 /* default load address */
348#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200349
Stefan Roeseb79316f2005-08-15 12:31:23 +0200350#endif /* __CONFIG_H */