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Rob Herring37fc0ed2011-10-24 08:50:20 +00001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rob Herring37fc0ed2011-10-24 08:50:20 +00005 */
6
7#include <common.h>
8#include <ahci.h>
Rob Herringbd0d90e2012-02-21 12:52:26 +00009#include <netdev.h>
Rob Herring37fc0ed2011-10-24 08:50:20 +000010#include <scsi.h>
11
Alexey Brodkin1ace4022014-02-26 17:47:58 +040012#include <linux/sizes.h>
Rob Herring877012d2012-02-01 16:57:54 +000013#include <asm/io.h>
Rob Herring37fc0ed2011-10-24 08:50:20 +000014
Rob Herring76c39992013-06-12 22:24:52 -050015#define HB_AHCI_BASE 0xffe08000
16
Rob Herring083ffd62015-06-05 00:58:42 +010017#define HB_SCU_A9_PWR_STATUS 0xfff10008
Rob Herring0c34e692012-02-01 16:57:55 +000018#define HB_SREG_A9_PWR_REQ 0xfff3cf00
Rob Herring4a3ea212012-02-01 16:57:57 +000019#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
Rob Herring76c39992013-06-12 22:24:52 -050020#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
Mark Langsdorff8973322015-06-05 00:58:43 +010021#define HB_SREG_A15_PWR_CTRL 0xfff3c200
Rob Herring76c39992013-06-12 22:24:52 -050022
Rob Herring0c34e692012-02-01 16:57:55 +000023#define HB_PWR_SUSPEND 0
24#define HB_PWR_SOFT_RESET 1
25#define HB_PWR_HARD_RESET 2
26#define HB_PWR_SHUTDOWN 3
27
Rob Herring76c39992013-06-12 22:24:52 -050028#define PWRDOM_STAT_SATA 0x80000000
29#define PWRDOM_STAT_PCI 0x40000000
30#define PWRDOM_STAT_EMMC 0x20000000
31
Rob Herring083ffd62015-06-05 00:58:42 +010032#define HB_SCU_A9_PWR_NORMAL 0
33#define HB_SCU_A9_PWR_DORMANT 2
34#define HB_SCU_A9_PWR_OFF 3
35
Rob Herring37fc0ed2011-10-24 08:50:20 +000036DECLARE_GLOBAL_DATA_PTR;
37
Mark Langsdorfef51c412015-06-05 00:58:49 +010038void cphy_disable_overrides(void);
39
Rob Herring37fc0ed2011-10-24 08:50:20 +000040/*
41 * Miscellaneous platform dependent initialisations
42 */
43int board_init(void)
44{
45 icache_enable();
46
47 return 0;
48}
49
Rob Herring9a420982011-12-15 11:15:50 +000050/* We know all the init functions have been run now */
51int board_eth_init(bd_t *bis)
52{
53 int rc = 0;
54
55#ifdef CONFIG_CALXEDA_XGMAC
56 rc += calxedaxgmac_initialize(0, 0xfff50000);
57 rc += calxedaxgmac_initialize(1, 0xfff51000);
58#endif
59 return rc;
60}
61
Ian Campbellb9463222014-03-07 01:20:57 +000062#ifdef CONFIG_SCSI_AHCI_PLAT
63void scsi_init(void)
Rob Herring37fc0ed2011-10-24 08:50:20 +000064{
Rob Herring76c39992013-06-12 22:24:52 -050065 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
Rob Herring4a3ea212012-02-01 16:57:57 +000066
Mark Langsdorfef51c412015-06-05 00:58:49 +010067 cphy_disable_overrides();
Rob Herring76c39992013-06-12 22:24:52 -050068 if (reg & PWRDOM_STAT_SATA) {
Scott Wood9efaca32015-04-17 09:19:01 -050069 ahci_init((void __iomem *)HB_AHCI_BASE);
Rob Herring76c39992013-06-12 22:24:52 -050070 scsi_scan(1);
71 }
Ian Campbellb9463222014-03-07 01:20:57 +000072}
73#endif
74
75#ifdef CONFIG_MISC_INIT_R
76int misc_init_r(void)
77{
78 char envbuffer[16];
79 u32 boot_choice;
Rob Herring4a3ea212012-02-01 16:57:57 +000080
81 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
82 sprintf(envbuffer, "bootcmd%d", boot_choice);
83 if (getenv(envbuffer)) {
84 sprintf(envbuffer, "run bootcmd%d", boot_choice);
85 setenv("bootcmd", envbuffer);
86 } else
87 setenv("bootcmd", "");
88
Rob Herring37fc0ed2011-10-24 08:50:20 +000089 return 0;
90}
Rob Herring95395022013-06-12 22:24:53 -050091#endif
Rob Herring37fc0ed2011-10-24 08:50:20 +000092
93int dram_init(void)
94{
95 gd->ram_size = SZ_512M;
96 return 0;
97}
98
Rob Herring76c39992013-06-12 22:24:52 -050099#if defined(CONFIG_OF_BOARD_SETUP)
Simon Glasse895a4b2014-10-23 18:58:47 -0600100int ft_board_setup(void *fdt, bd_t *bd)
Rob Herring76c39992013-06-12 22:24:52 -0500101{
102 static const char disabled[] = "disabled";
103 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
104
105 if (!(reg & PWRDOM_STAT_SATA))
106 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
107 disabled, sizeof(disabled), 1);
108
109 if (!(reg & PWRDOM_STAT_EMMC))
110 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
111 disabled, sizeof(disabled), 1);
Simon Glasse895a4b2014-10-23 18:58:47 -0600112
113 return 0;
Rob Herring76c39992013-06-12 22:24:52 -0500114}
115#endif
116
Mark Langsdorff8973322015-06-05 00:58:43 +0100117static int is_highbank(void)
118{
119 uint32_t midr;
120
121 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
122
123 return (midr & 0xfff0) == 0xc090;
124}
125
Rob Herring37fc0ed2011-10-24 08:50:20 +0000126void reset_cpu(ulong addr)
127{
Rob Herring0c34e692012-02-01 16:57:55 +0000128 writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
Mark Langsdorff8973322015-06-05 00:58:43 +0100129 if (is_highbank())
130 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
131 else
132 writel(0x1, HB_SREG_A15_PWR_CTRL);
Rob Herring5bedf882012-12-02 17:06:22 +0000133
134 wfi();
Rob Herring37fc0ed2011-10-24 08:50:20 +0000135}
Mark Langsdorfef51c412015-06-05 00:58:49 +0100136
137/*
138 * turn off the override before transferring control to Linux, since Linux
139 * may not support spread spectrum.
140 */
141void arch_preboot_os(void)
142{
143 cphy_disable_overrides();
144}