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wdenk8f0b7cb2005-03-27 23:41:39 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02003 * Stäubli Faverges - <www.staubli.com>
wdenk8f0b7cb2005-03-27 23:41:39 +00004 * Pierre AUBERT p.aubert@staubli.com
5 *
6 * (C) Copyright 2005
7 * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
wdenk8f0b7cb2005-03-27 23:41:39 +000010 */
11
12/*
13 * Basic video support for SMI SM501 "Voyager" graphic controller
14 */
15
16#include <common.h>
17
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020018#include <asm/io.h>
Simon Glassf66f88f2017-05-17 08:22:34 -060019#include <pci.h>
wdenk8f0b7cb2005-03-27 23:41:39 +000020#include <video_fb.h>
21#include <sm501.h>
22
23#define read8(ptrReg) \
24 *(volatile unsigned char *)(sm501.isaBase + ptrReg)
25
26#define write8(ptrReg,value) \
27 *(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
28
29#define read16(ptrReg) \
30 (*(volatile unsigned short *)(sm501.isaBase + ptrReg))
31
32#define write16(ptrReg,value) \
33 (*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
34
35#define read32(ptrReg) \
36 (*(volatile unsigned int *)(sm501.isaBase + ptrReg))
37
38#define write32(ptrReg, value) \
39 (*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
40
41GraphicDevice sm501;
42
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020043void write_be32(int off, unsigned int val)
44{
45 out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
46}
47
48void write_le32(int off, unsigned int val)
49{
50 out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
51}
52
53void (*write_reg32)(int off, unsigned int val) = write_be32;
54
wdenk8f0b7cb2005-03-27 23:41:39 +000055/*-----------------------------------------------------------------------------
56 * SmiSetRegs --
57 *-----------------------------------------------------------------------------
58 */
59static void SmiSetRegs (void)
60{
61 /*
62 * The content of the chipset register depends on the board (clocks,
63 * ...)
64 */
65 const SMI_REGS *preg = board_get_regs ();
66 while (preg->Index) {
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020067 write_reg32 (preg->Index, preg->Value);
wdenk8f0b7cb2005-03-27 23:41:39 +000068 /*
69 * Insert a delay between
70 */
71 udelay (1000);
72 preg ++;
73 }
74}
75
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020076#ifdef CONFIG_VIDEO_SM501_PCI
77static struct pci_device_id sm501_pci_tbl[] = {
78 { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
79 {}
80};
81#endif
82
Anatolij Gustschinf0a92152010-05-26 10:38:58 +020083/*
84 * We do not enforce board code to provide empty/unused
85 * functions for this driver and define weak default
86 * functions here.
87 */
88unsigned int __board_video_init (void)
89{
90 return 0;
91}
92
93unsigned int board_video_init (void)
94 __attribute__((weak, alias("__board_video_init")));
95
96unsigned int __board_video_get_fb (void)
97{
98 return 0;
99}
100
101unsigned int board_video_get_fb (void)
102 __attribute__((weak, alias("__board_video_get_fb")));
103
104void __board_validate_screen (unsigned int base)
105{
106}
107
108void board_validate_screen (unsigned int base)
109 __attribute__((weak, alias("__board_validate_screen")));
110
wdenk8f0b7cb2005-03-27 23:41:39 +0000111/*-----------------------------------------------------------------------------
112 * video_hw_init --
113 *-----------------------------------------------------------------------------
114 */
115void *video_hw_init (void)
116{
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200117#ifdef CONFIG_VIDEO_SM501_PCI
118 unsigned int pci_mem_base, pci_mmio_base;
119 unsigned int id;
120 unsigned short device_id;
121 pci_dev_t devbusfn;
122 int mem;
123#endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000124 unsigned int *vm, i;
125
126 memset (&sm501, 0, sizeof (GraphicDevice));
127
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200128#ifdef CONFIG_VIDEO_SM501_PCI
129 printf("Video: ");
130
131 /* Look for SM501/SM502 chips */
132 devbusfn = pci_find_devices(sm501_pci_tbl, 0);
133 if (devbusfn < 0) {
134 printf ("PCI Controller not found.\n");
135 goto not_pci;
136 }
137
138 /* Setup */
139 pci_write_config_dword (devbusfn, PCI_COMMAND,
140 (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
141 pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
142 pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
143 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
144 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
145 sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
146 sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
147
148 if (sm501.isaBase)
149 write_reg32 = write_le32;
150
151 mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
152 mem = (mem & 0x0000e000) >> 13;
153 switch (mem) {
154 case 1:
155 mem = 8;
156 break;
157 case 2:
158 mem = 16;
159 break;
160 case 3:
161 mem = 32;
162 break;
163 case 4:
164 mem = 64;
165 break;
166 case 5:
167 mem = 2;
168 break;
169 case 0:
170 default:
171 mem = 4;
172 }
173 printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
174not_pci:
175#endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000176 /*
177 * Initialization of the access to the graphic chipset Retreive base
178 * address of the chipset (see board/RPXClassic/eccx.c)
179 */
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200180 if (!sm501.isaBase) {
181 sm501.isaBase = board_video_init ();
182 if (!sm501.isaBase)
183 return NULL;
wdenk8f0b7cb2005-03-27 23:41:39 +0000184 }
185
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200186 if (!sm501.frameAdrs) {
187 sm501.frameAdrs = board_video_get_fb ();
188 if (!sm501.frameAdrs)
189 return NULL;
wdenk8f0b7cb2005-03-27 23:41:39 +0000190 }
191
192 sm501.winSizeX = board_get_width ();
193 sm501.winSizeY = board_get_height ();
194
195#if defined(CONFIG_VIDEO_SM501_8BPP)
196 sm501.gdfIndex = GDF__8BIT_INDEX;
197 sm501.gdfBytesPP = 1;
198
199#elif defined(CONFIG_VIDEO_SM501_16BPP)
200 sm501.gdfIndex = GDF_16BIT_565RGB;
201 sm501.gdfBytesPP = 2;
202
203#elif defined(CONFIG_VIDEO_SM501_32BPP)
204 sm501.gdfIndex = GDF_32BIT_X888RGB;
205 sm501.gdfBytesPP = 4;
206#else
207#error Unsupported SM501 BPP
208#endif
209
210 sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
211
212 /* Load Smi registers */
213 SmiSetRegs ();
214
215 /* (see board/RPXClassic/RPXClassic.c) */
216 board_validate_screen (sm501.isaBase);
217
218 /* Clear video memory */
219 i = sm501.memSize/4;
220 vm = (unsigned int *)sm501.frameAdrs;
221 while(i--)
222 *vm++ = 0;
223
224 return (&sm501);
225}