blob: 86752d91ffeb955b6f24ce7b1cffa4716715e6bf [file] [log] [blame]
Masahiro Yamada7434bfa2017-01-21 18:05:29 +09001/*
2 * Copyright (C) 2017 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
Simon Glass4af0d7e2017-05-17 17:18:07 -06008#include <common.h>
Simon Glass9d922452017-05-17 17:18:03 -06009#include <dm.h>
Masahiro Yamada7434bfa2017-01-21 18:05:29 +090010#include <dm/pinctrl.h>
11
12#include "pinctrl-uniphier.h"
13
14static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38};
15static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
16static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42};
17static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
18static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60,
19 61, 62, 63, 64, 65, 66, 67};
20static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21 0, 0, 0, 0};
22static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61,
23 63, 64, 67};
24static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
25static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76,
26 77, 78, 79, 80, 81, 82, 83};
27static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28 0, 0, 0, 0};
29static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77,
30 79, 80, 83};
31static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
32static const unsigned i2c0_pins[] = {104, 105};
33static const int i2c0_muxvals[] = {0, 0};
34static const unsigned i2c1_pins[] = {106, 107};
35static const int i2c1_muxvals[] = {0, 0};
36static const unsigned i2c2_pins[] = {108, 109};
37static const int i2c2_muxvals[] = {0, 0};
38static const unsigned i2c3_pins[] = {110, 111};
39static const int i2c3_muxvals[] = {0, 0};
40static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
41 27, 28, 29, 30};
42static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
43static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51};
44static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
45static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
46 12, 13, 14};
47static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
48 0};
49static const unsigned system_bus_cs1_pins[] = {15};
50static const int system_bus_cs1_muxvals[] = {0};
51static const unsigned uart0_pins[] = {92, 93};
52static const int uart0_muxvals[] = {0, 0};
53static const unsigned uart1_pins[] = {94, 95};
54static const int uart1_muxvals[] = {0, 0};
55static const unsigned uart2_pins[] = {96, 97};
56static const int uart2_muxvals[] = {0, 0};
57static const unsigned uart3_pins[] = {98, 99};
58static const int uart3_muxvals[] = {0, 0};
59static const unsigned usb0_pins[] = {84, 85};
60static const int usb0_muxvals[] = {0, 0};
61static const unsigned usb1_pins[] = {86, 87};
62static const int usb1_muxvals[] = {0, 0};
63static const unsigned usb2_pins[] = {88, 89};
64static const int usb2_muxvals[] = {0, 0};
65static const unsigned usb3_pins[] = {90, 91};
66static const int usb3_muxvals[] = {0, 0};
67
68static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = {
69 UNIPHIER_PINCTRL_GROUP(emmc),
70 UNIPHIER_PINCTRL_GROUP(emmc_dat8),
71 UNIPHIER_PINCTRL_GROUP(ether_rgmii),
72 UNIPHIER_PINCTRL_GROUP(ether_rmii),
73 UNIPHIER_PINCTRL_GROUP(ether1_rgmii),
74 UNIPHIER_PINCTRL_GROUP(ether1_rmii),
75 UNIPHIER_PINCTRL_GROUP(i2c0),
76 UNIPHIER_PINCTRL_GROUP(i2c1),
77 UNIPHIER_PINCTRL_GROUP(i2c2),
78 UNIPHIER_PINCTRL_GROUP(i2c3),
79 UNIPHIER_PINCTRL_GROUP(nand),
80 UNIPHIER_PINCTRL_GROUP(sd),
81 UNIPHIER_PINCTRL_GROUP_SPL(system_bus),
82 UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1),
83 UNIPHIER_PINCTRL_GROUP_SPL(uart0),
84 UNIPHIER_PINCTRL_GROUP_SPL(uart1),
85 UNIPHIER_PINCTRL_GROUP_SPL(uart2),
86 UNIPHIER_PINCTRL_GROUP_SPL(uart3),
87 UNIPHIER_PINCTRL_GROUP(usb0),
88 UNIPHIER_PINCTRL_GROUP(usb1),
89 UNIPHIER_PINCTRL_GROUP(usb2),
90 UNIPHIER_PINCTRL_GROUP(usb3),
91};
92
93static const char * const uniphier_pxs3_functions[] = {
94 UNIPHIER_PINMUX_FUNCTION(emmc),
95 UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
96 UNIPHIER_PINMUX_FUNCTION(ether_rmii),
97 UNIPHIER_PINMUX_FUNCTION(ether1_rgmii),
98 UNIPHIER_PINMUX_FUNCTION(ether1_rmii),
99 UNIPHIER_PINMUX_FUNCTION(i2c0),
100 UNIPHIER_PINMUX_FUNCTION(i2c1),
101 UNIPHIER_PINMUX_FUNCTION(i2c2),
102 UNIPHIER_PINMUX_FUNCTION(i2c3),
103 UNIPHIER_PINMUX_FUNCTION(nand),
104 UNIPHIER_PINMUX_FUNCTION(sd),
105 UNIPHIER_PINMUX_FUNCTION_SPL(system_bus),
106 UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
107 UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
108 UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
109 UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
110 UNIPHIER_PINMUX_FUNCTION(usb0),
111 UNIPHIER_PINMUX_FUNCTION(usb1),
112 UNIPHIER_PINMUX_FUNCTION(usb2),
113 UNIPHIER_PINMUX_FUNCTION(usb3),
114};
115
116static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = {
117 .groups = uniphier_pxs3_groups,
118 .groups_count = ARRAY_SIZE(uniphier_pxs3_groups),
119 .functions = uniphier_pxs3_functions,
120 .functions_count = ARRAY_SIZE(uniphier_pxs3_functions),
121 .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL,
122};
123
124static int uniphier_pxs3_pinctrl_probe(struct udevice *dev)
125{
126 return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata);
127}
128
129static const struct udevice_id uniphier_pxs3_pinctrl_match[] = {
130 { .compatible = "socionext,uniphier-pxs3-pinctrl" },
131 { /* sentinel */ }
132};
133
134U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = {
135 .name = "uniphier-pxs3-pinctrl",
136 .id = UCLASS_PINCTRL,
137 .of_match = of_match_ptr(uniphier_pxs3_pinctrl_match),
138 .probe = uniphier_pxs3_pinctrl_probe,
139 .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
140 .ops = &uniphier_pinctrl_ops,
141};