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Dinh Nguyen77754402012-10-04 06:46:02 +00001/*
Pavel Machek5095ee02014-09-08 14:08:45 +02002 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
Dinh Nguyen77754402012-10-04 06:46:02 +00003 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Dinh Nguyen77754402012-10-04 06:46:02 +00005 */
Pavel Machek5095ee02014-09-08 14:08:45 +02006#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7#define __CONFIG_SOCFPGA_CYCLONE5_H__
Dinh Nguyen77754402012-10-04 06:46:02 +00008
9#include <asm/arch/socfpga_base_addrs.h>
Chin Liang See5d649d22013-09-11 11:24:48 -050010#include "../../board/altera/socfpga/pinmux_config.h"
Chin Liang Seedc4d4aa2014-06-10 01:17:42 -050011#include "../../board/altera/socfpga/iocsr_config.h"
Chin Liang Seeddfeb0a2014-03-04 22:13:53 -060012#include "../../board/altera/socfpga/pll_config.h"
Dinh Nguyen77754402012-10-04 06:46:02 +000013
Marek Vasut47f9b4e2014-09-08 14:08:45 +020014/* U-Boot Commands */
15#define CONFIG_SYS_NO_FLASH
16#include <config_cmd_default.h>
17#define CONFIG_DOS_PARTITION
18#define CONFIG_FAT_WRITE
19#define CONFIG_HW_WATCHDOG
20
21#define CONFIG_CMD_ASKENV
22#define CONFIG_CMD_BOOTZ
23#define CONFIG_CMD_CACHE
24#define CONFIG_CMD_DHCP
25#define CONFIG_CMD_EXT4
26#define CONFIG_CMD_EXT4_WRITE
27#define CONFIG_CMD_FAT
28#define CONFIG_CMD_FPGA
Marek Vasut2f210632014-09-19 13:28:47 +020029#define CONFIG_CMD_FS_GENERIC
Marek Vasut47f9b4e2014-09-08 14:08:45 +020030#define CONFIG_CMD_GREPENV
31#define CONFIG_CMD_MII
32#define CONFIG_CMD_MMC
33#define CONFIG_CMD_NET
34#define CONFIG_CMD_PING
35#define CONFIG_CMD_SETEXPR
36
37#define CONFIG_REGEX /* Enable regular expression support */
38
Pavel Machek5095ee02014-09-08 14:08:45 +020039/* Memory configurations */
Marek Vasut47f9b4e2014-09-08 14:08:45 +020040#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
Dinh Nguyen77754402012-10-04 06:46:02 +000041
Marek Vasut47f9b4e2014-09-08 14:08:45 +020042/* Booting Linux */
43#define CONFIG_BOOTDELAY 3
44#define CONFIG_BOOTFILE "zImage"
45#define CONFIG_BOOTARGS "console=ttyS0" __stringify(CONFIG_BAUDRATE)
Chin Liang See97ce2742014-09-19 05:33:19 -050046#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
Marek Vasut47f9b4e2014-09-08 14:08:45 +020047#define CONFIG_BOOTCOMMAND "run ramboot"
Chin Liang See97ce2742014-09-19 05:33:19 -050048#else
Marek Vasut47f9b4e2014-09-08 14:08:45 +020049#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
50#endif
51#define CONFIG_LOADADDR 0x8000
52#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
53
Pavel Machek5095ee02014-09-08 14:08:45 +020054/* Ethernet on SoC (EMAC) */
55#if defined(CONFIG_CMD_NET)
Marek Vasut5a1d0ad2014-10-10 01:50:23 +020056#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
Marek Vasut47f9b4e2014-09-08 14:08:45 +020057#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
58#define CONFIG_EPHY0_PHY_ADDR 0
59
60/* PHY */
61#define CONFIG_EPHY1_PHY_ADDR 4
62#define CONFIG_PHY_MICREL
63#define CONFIG_PHY_MICREL_KSZ9021
64#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
65#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
66#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
67#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
68
Chin Liang See97ce2742014-09-19 05:33:19 -050069#endif
Dinh Nguyen77754402012-10-04 06:46:02 +000070
Pavel Machek5095ee02014-09-08 14:08:45 +020071/* Extra Environment */
72#define CONFIG_HOSTNAME socfpga_cyclone5
Dinh Nguyen77754402012-10-04 06:46:02 +000073
74#define CONFIG_EXTRA_ENV_SETTINGS \
75 "verify=n\0" \
Marek Vasut5368c552012-09-23 17:41:24 +020076 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +000077 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
78 "bootm ${loadaddr} - ${fdt_addr}\0" \
Chin Liang See97ce2742014-09-19 05:33:19 -050079 "bootimage=zImage\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +000080 "fdt_addr=100\0" \
Chin Liang See97ce2742014-09-19 05:33:19 -050081 "fdtimage=socfpga.dtb\0" \
82 "fsloadcmd=ext2load\0" \
83 "bootm ${loadaddr} - ${fdt_addr}\0" \
84 "mmcroot=/dev/mmcblk0p2\0" \
85 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
86 " root=${mmcroot} rw rootwait;" \
87 "bootz ${loadaddr} - ${fdt_addr}\0" \
88 "mmcload=mmc rescan;" \
Marek Vasut2f210632014-09-19 13:28:47 +020089 "load mmc 0:1 ${loadaddr} ${bootimage};" \
90 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
Dinh Nguyen77754402012-10-04 06:46:02 +000091 "qspiroot=/dev/mtdblock0\0" \
92 "qspirootfstype=jffs2\0" \
93 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
94 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
95 "bootm ${loadaddr} - ${fdt_addr}\0"
96
Pavel Machek5095ee02014-09-08 14:08:45 +020097/* The rest of the configuration is shared */
98#include <configs/socfpga_common.h>
Dinh Nguyen77754402012-10-04 06:46:02 +000099
Pavel Machek5095ee02014-09-08 14:08:45 +0200100#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */