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Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +02001/*
2 * SPI flash internal definitions
3 *
4 * Copyright (C) 2008 Atmel Corporation
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +05305 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 *
Jagannadha Sutradharudu Teki0c88a842013-10-10 22:32:55 +05307 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +02008 */
9
Jagannadha Sutradharudu Teki469146c2013-10-10 22:14:09 +053010#ifndef _SF_INTERNAL_H_
11#define _SF_INTERNAL_H_
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020012
Simon Glassff0960f2014-10-13 23:42:04 -060013#include <linux/types.h>
14#include <linux/compiler.h>
15
16/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
17enum spi_dual_flash {
18 SF_SINGLE_FLASH = 0,
19 SF_DUAL_STACKED_FLASH = 1 << 0,
20 SF_DUAL_PARALLEL_FLASH = 1 << 1,
21};
22
23/* Enum list - Full read commands */
24enum spi_read_cmds {
25 ARRAY_SLOW = 1 << 0,
Jagannadha Sutradharudu Teki6dd6e902014-12-12 19:36:11 +053026 ARRAY_FAST = 1 << 1,
27 DUAL_OUTPUT_FAST = 1 << 2,
28 DUAL_IO_FAST = 1 << 3,
29 QUAD_OUTPUT_FAST = 1 << 4,
30 QUAD_IO_FAST = 1 << 5,
Simon Glassff0960f2014-10-13 23:42:04 -060031};
32
Jagannadha Sutradharudu Teki6dd6e902014-12-12 19:36:11 +053033/* Normal - Extended - Full command set */
Jagan Teki5d69df32015-06-27 00:51:30 +053034#define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
35#define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
36#define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
Simon Glassff0960f2014-10-13 23:42:04 -060037
38/* sf param flags */
39enum {
Marek Vasut0a026552015-08-03 01:28:56 +020040#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
Simon Glassff0960f2014-10-13 23:42:04 -060041 SECT_4K = 1 << 0,
Marek Vasut0a026552015-08-03 01:28:56 +020042#else
43 SECT_4K = 0 << 0,
44#endif
Simon Glassff0960f2014-10-13 23:42:04 -060045 SECT_32K = 1 << 1,
46 E_FSR = 1 << 2,
Jagan Tekiaae00f82015-11-26 01:03:33 +053047 SST_WR = 1 << 3,
48 WR_QPP = 1 << 4,
Simon Glassff0960f2014-10-13 23:42:04 -060049};
50
Jagan Teki1fabefd2015-09-29 11:17:02 +053051enum spi_nor_option_flags {
52 SNOR_F_SST_WR = (1 << 0),
Jagan Tekibaaaa752015-09-29 16:54:31 +053053 SNOR_F_USE_FSR = (1 << 1),
Jagan Teki1fabefd2015-09-29 11:17:02 +053054};
55
Jagannadha Sutradharudu Tekiff063ed2014-01-11 16:50:45 +053056#define SPI_FLASH_3B_ADDR_LEN 3
57#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +053058#define SPI_FLASH_16MB_BOUN 0x1000000
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +020059
Jagannadha Sutradharudu Tekid08a1ba2013-12-26 13:54:57 +053060/* CFI Manufacture ID's */
61#define SPI_FLASH_CFI_MFR_SPANSION 0x01
62#define SPI_FLASH_CFI_MFR_STMICRO 0x20
Jagannadha Sutradharudu Teki06795122013-12-26 14:13:36 +053063#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
Fabio Estevam51687212015-11-17 16:50:53 -020064#define SPI_FLASH_CFI_MFR_SST 0xbf
Jagannadha Sutradharudu Tekid08a1ba2013-12-26 13:54:57 +053065#define SPI_FLASH_CFI_MFR_WINBOND 0xef
Jagan Teki6f9d6702015-09-30 02:01:23 +053066#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
Jagannadha Sutradharudu Tekid08a1ba2013-12-26 13:54:57 +053067
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +053068/* Erase commands */
69#define CMD_ERASE_4K 0x20
70#define CMD_ERASE_32K 0x52
71#define CMD_ERASE_CHIP 0xc7
72#define CMD_ERASE_64K 0xd8
73
74/* Write commands */
Mike Frysingerb4c87d62012-01-28 16:26:03 -080075#define CMD_WRITE_STATUS 0x01
Mike Frysingerd4aa5002011-04-25 06:58:29 +000076#define CMD_PAGE_PROGRAM 0x02
Mike Frysinger66ecb7c2011-04-25 06:59:53 +000077#define CMD_WRITE_DISABLE 0x04
Jagan Teki5d69df32015-06-27 00:51:30 +053078#define CMD_READ_STATUS 0x05
Jagannadha Sutradharudu Teki3163aaa2014-01-11 15:13:11 +053079#define CMD_QUAD_PAGE_PROGRAM 0x32
Mike Frysingerffdb20b2013-12-03 16:43:27 -070080#define CMD_READ_STATUS1 0x35
Mike Frysingere7b44ed2011-01-10 02:20:13 -050081#define CMD_WRITE_ENABLE 0x06
Jagan Teki5d69df32015-06-27 00:51:30 +053082#define CMD_READ_CONFIG 0x35
83#define CMD_FLAG_STATUS 0x70
Mike Frysinger61630452011-01-10 02:20:12 -050084
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +053085/* Read commands */
86#define CMD_READ_ARRAY_SLOW 0x03
87#define CMD_READ_ARRAY_FAST 0x0b
Jagannadha Sutradharudu Teki4e09cc12014-01-11 15:10:28 +053088#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
89#define CMD_READ_DUAL_IO_FAST 0xbb
Jagannadha Sutradharudu Teki3163aaa2014-01-11 15:13:11 +053090#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
Jagannadha Sutradharudu Tekic4ba0d82013-12-24 15:24:31 +053091#define CMD_READ_QUAD_IO_FAST 0xeb
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +053092#define CMD_READ_ID 0x9f
Jagannadha Sutradharudu Tekie612ddf2013-06-19 15:37:09 +053093
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +053094/* Bank addr access commands */
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +053095#ifdef CONFIG_SPI_FLASH_BAR
Jagannadha Sutradharudu Teki1dcd6d02013-06-19 15:33:58 +053096# define CMD_BANKADDR_BRWR 0x17
97# define CMD_BANKADDR_BRRD 0x16
98# define CMD_EXTNADDR_WREAR 0xC5
99# define CMD_EXTNADDR_RDEAR 0xC8
100#endif
Jagannadha Sutradharudu Tekicf6b11d2013-06-19 15:31:23 +0530101
Mike Frysinger61630452011-01-10 02:20:12 -0500102/* Common status */
Jagannadha Sutradharudu Teki2ba863f2014-01-12 21:38:21 +0530103#define STATUS_WIP (1 << 0)
Jagannadha Sutradharudu Tekid08a1ba2013-12-26 13:54:57 +0530104#define STATUS_QEB_WINSPAN (1 << 1)
Simon Glassff0960f2014-10-13 23:42:04 -0600105#define STATUS_QEB_MXIC (1 << 6)
Jagannadha Sutradharudu Teki2ba863f2014-01-12 21:38:21 +0530106#define STATUS_PEC (1 << 7)
Fabio Estevam41b358d2015-11-05 12:43:41 -0200107#define SR_BP0 BIT(2) /* Block protect 0 */
108#define SR_BP1 BIT(3) /* Block protect 1 */
109#define SR_BP2 BIT(4) /* Block protect 2 */
Mike Frysinger61630452011-01-10 02:20:12 -0500110
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530111/* Flash timeout values */
112#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
Jagan Teki5d69df32015-06-27 00:51:30 +0530113#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530114#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
115
116/* SST specific */
117#ifdef CONFIG_SPI_FLASH_SST
Jagannadha Sutradharudu Tekice22b922013-10-07 19:34:56 +0530118# define CMD_SST_BP 0x02 /* Byte Program */
Jagan Teki5d69df32015-06-27 00:51:30 +0530119# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530120
121int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
122 const void *buf);
Bin Meng74c2cee2014-12-12 19:36:13 +0530123int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
124 const void *buf);
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530125#endif
126
Simon Glassff0960f2014-10-13 23:42:04 -0600127/**
128 * struct spi_flash_params - SPI/QSPI flash device params structure
129 *
130 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
131 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
132 * @ext_jedec: Device ext_jedec ID
Jagannadha Sutradharudu Tekic650ca72015-04-27 21:04:15 +0530133 * @sector_size: Isn't necessarily a sector size from vendor,
134 * the size listed here is what works with CMD_ERASE_64K
Jagan Teki5d69df32015-06-27 00:51:30 +0530135 * @nr_sectors: No.of sectors on this device
Simon Glassff0960f2014-10-13 23:42:04 -0600136 * @e_rd_cmd: Enum list for read commands
137 * @flags: Important param, for flash specific behaviour
138 */
139struct spi_flash_params {
140 const char *name;
141 u32 jedec;
142 u16 ext_jedec;
143 u32 sector_size;
144 u32 nr_sectors;
145 u8 e_rd_cmd;
146 u16 flags;
147};
148
149extern const struct spi_flash_params spi_flash_params_table[];
150
Haavard Skinnemoend25ce7d2008-05-16 11:10:33 +0200151/* Send a single-byte command to the device and read the response */
152int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
153
154/*
155 * Send a multi-byte command to the device and read the response. Used
156 * for flash array reads, etc.
157 */
158int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
159 size_t cmd_len, void *data, size_t data_len);
160
161/*
162 * Send a multi-byte command to the device followed by (optional)
163 * data. Used for programming the flash array, etc.
164 */
165int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
166 const void *data, size_t data_len);
167
Mike Frysingerd4aa5002011-04-25 06:58:29 +0000168
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530169/* Flash erase(sectors) operation, support all possible erase commands */
170int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
Jagannadha Sutradharudu Teki10ca45d2013-10-02 19:34:53 +0530171
Fabio Estevamc3c016c2015-11-05 12:43:42 -0200172/* Lock stmicro spi flash region */
173int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
174
175/* Unlock stmicro spi flash region */
176int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
177
178/* Check if a stmicro spi flash region is completely locked */
179int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
180
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530181/* Enable writing on the SPI flash */
Mike Frysinger2744a4e2011-04-23 23:05:55 +0000182static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
183{
184 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
185}
186
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530187/* Disable writing on the SPI flash */
Mike Frysinger66ecb7c2011-04-25 06:59:53 +0000188static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
189{
190 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
191}
192
193/*
Jagannadha Sutradharudu Tekiacc23752013-06-21 19:19:00 +0530194 * Used for spi_flash write operation
195 * - SPI claim
196 * - spi_flash_cmd_write_enable
197 * - spi_flash_cmd_write
198 * - spi_flash_cmd_wait_ready
199 * - SPI release
200 */
201int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
202 size_t cmd_len, const void *buf, size_t buf_len);
Mike Frysinger61630452011-01-10 02:20:12 -0500203
204/*
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530205 * Flash write operation, support all possible write commands.
206 * Write the requested data out breaking it up into multiple write
207 * commands as needed per the write size.
Mike Frysinger61630452011-01-10 02:20:12 -0500208 */
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530209int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
210 size_t len, const void *buf);
Mike Frysinger61630452011-01-10 02:20:12 -0500211
Jagannadha Sutradharudu Tekia5e81992013-10-02 19:38:49 +0530212/*
213 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
214 * bus. Used as common part of the ->read() operation.
215 */
216int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
217 size_t cmd_len, void *data, size_t data_len);
218
219/* Flash read operation, support all possible read commands */
220int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
221 size_t len, void *data);
222
Daniel Schwierzeck9fe6d872015-04-27 07:42:04 +0200223#ifdef CONFIG_SPI_FLASH_MTD
224int spi_flash_mtd_register(struct spi_flash *flash);
225void spi_flash_mtd_unregister(void);
226#endif
227
Jagan Teki3847c0c2015-12-11 21:36:34 +0530228/**
229 * spi_flash_scan - scan the SPI FLASH
Jagan Teki3847c0c2015-12-11 21:36:34 +0530230 * @flash: the spi flash structure
231 *
232 * The drivers can use this fuction to scan the SPI FLASH.
233 * In the scanning, it will try to get all the necessary information to
234 * fill the spi_flash{}.
235 *
236 * Return: 0 for success, others for failure.
237 */
Jagan Tekibfdb07e2015-12-06 21:33:32 +0530238int spi_flash_scan(struct spi_flash *flash);
Jagan Teki3847c0c2015-12-11 21:36:34 +0530239
Jagannadha Sutradharudu Teki469146c2013-10-10 22:14:09 +0530240#endif /* _SF_INTERNAL_H_ */