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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +05302/*
3 * dts file for Xilinx ZynqMP Mini Configuration
4 *
5 * (C) Copyright 2018, Xilinx, Inc.
6 *
7 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +05308 */
9
10/dts-v1/;
11
12/ {
Michal Simekf3289d12018-11-21 15:52:31 +010013 model = "ZynqMP MINI EMMC0";
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +053014 compatible = "xlnx,zynqmp";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 aliases {
19 serial0 = &dcc;
20 mmc0 = &sdhci0;
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +053021 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@0 {
28 device_type = "memory";
29 reg = <0x0 0x0 0x0 0x20000000>;
30 };
31
32 dcc: dcc {
33 compatible = "arm,dcc";
34 status = "disabled";
35 u-boot,dm-pre-reloc;
36 };
37
Siva Durga Prasad Paladugubc0f4ed2018-06-05 15:18:32 +053038 clk_xin: clk_xin {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <200000000>;
42 };
43
T Karthik Reddy50a6bd02021-04-29 08:02:29 -060044 firmware {
45 zynqmp_firmware: zynqmp-firmware {
46 compatible = "xlnx,zynqmp-firmware";
47 #power-domain-cells = <1>;
48 method = "smc";
49 u-boot,dm-pre-reloc;
50
51 zynqmp_power: zynqmp-power {
52 u-boot,dm-pre-reloc;
53 compatible = "xlnx,zynqmp-power";
54 mboxes = <&ipi_mailbox_pmu1 0>,
55 <&ipi_mailbox_pmu1 1>;
56 mbox-names = "tx", "rx";
57 };
58 };
59 };
60
61 zynqmp_ipi: zynqmp_ipi {
62 u-boot,dm-pre-reloc;
63 compatible = "xlnx,zynqmp-ipi-mailbox";
64 xlnx,ipi-id = <0>;
65 #address-cells = <2>;
66 #size-cells = <2>;
67 ranges;
68
69 ipi_mailbox_pmu1: mailbox@ff990400 {
70 u-boot,dm-pre-reloc;
71 reg = <0x0 0xff9905c0 0x0 0x20>,
72 <0x0 0xff9905e0 0x0 0x20>,
73 <0x0 0xff990e80 0x0 0x20>,
74 <0x0 0xff990ea0 0x0 0x20>;
75 reg-names = "local_request_region",
76 "local_response_region",
77 "remote_request_region",
78 "remote_response_region";
79 #mbox-cells = <1>;
80 xlnx,ipi-id = <4>;
81 };
82 };
83
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +053084 amba: amba {
85 compatible = "simple-bus";
86 #address-cells = <2>;
87 #size-cells = <2>;
88 ranges;
89
90 sdhci0: sdhci@ff160000 {
91 u-boot,dm-pre-reloc;
92 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
93 status = "disabled";
Ashok Reddy Somad5843f22021-02-16 07:02:14 -070094 non-removable;
95 bus-width = <8>;
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +053096 reg = <0x0 0xff160000 0x0 0x1000>;
97 clock-names = "clk_xin", "clk_ahb";
Michal Simekd1fb3d02018-11-29 10:27:17 +010098 clocks = <&clk_xin &clk_xin>;
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +053099 xlnx,device_id = <0>;
100 };
Siva Durga Prasad Paladugu26780592018-01-05 16:16:16 +0530101 };
102};
103
104&dcc {
105 status = "okay";
106};
107
108&sdhci0 {
109 status = "okay";
110};