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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +02002/*
3 * Copyright (C) Marvell International Ltd. and its affiliates
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
Stefan Roese2fbc18f2015-10-22 12:36:31 +02006 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +02007 */
8
9#include <common.h>
Lei Wena7efd712011-10-18 20:11:42 +053010#include <asm/io.h>
Stefan Roese3dc23f72014-10-22 12:13:06 +020011#include <asm/arch/soc.h>
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020012
Stefan Roese2fbc18f2015-10-22 12:36:31 +020013#define TIMER_LOAD_VAL 0xffffffff
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020014
Stefan Roese787ddb72015-09-03 12:47:07 +020015static int init_done __attribute__((section(".data"))) = 0;
Stefan Roeseade741b2015-07-15 15:36:52 +020016
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020017/*
Stefan Roese2fbc18f2015-10-22 12:36:31 +020018 * Timer initialization
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020019 */
20int timer_init(void)
21{
Stefan Roeseade741b2015-07-15 15:36:52 +020022 /* Only init the timer once */
23 if (init_done)
24 return 0;
25 init_done = 1;
26
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020027 /* load value into timer */
Stefan Roese2fbc18f2015-10-22 12:36:31 +020028 writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10);
29 writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14);
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020030
Stefan Roese81e33f42015-12-21 13:56:33 +010031#if defined(CONFIG_ARCH_MVEBU)
Stefan Roese2fbc18f2015-10-22 12:36:31 +020032 /* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */
33 setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11));
34#endif
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020035 /* enable timer in auto reload mode */
Stefan Roese2fbc18f2015-10-22 12:36:31 +020036 setbits_le32(MVEBU_TIMER_BASE + 0x00, 0x3);
Prafulla Wadaskar4efb77d2009-06-20 11:01:53 +020037
38 return 0;
39}