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wdenk38635852002-08-27 05:55:31 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00006 */
7
8/*
9 * Cache support: switch on or off, get status
10 */
11#include <common.h>
12#include <command.h>
Matthew McClintockd0c4c332011-05-24 10:09:05 +000013#include <linux/compiler.h>
wdenk38635852002-08-27 05:55:31 +000014
Matthew McClintockd0c4c332011-05-24 10:09:05 +000015static int parse_argv(const char *);
16
Stefan Kristiansson23498932011-10-31 18:21:12 +000017void __weak invalidate_icache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000018{
Stefan Kristiansson23498932011-10-31 18:21:12 +000019 /* please define arch specific invalidate_icache_all */
20 puts("No arch specific invalidate_icache_all available!\n");
Matthew McClintockd0c4c332011-05-24 10:09:05 +000021}
wdenk38635852002-08-27 05:55:31 +000022
Joe Hershbergere9455fc2012-10-03 10:56:16 +000023int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000024{
25 switch (argc) {
26 case 2: /* on / off */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000027 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000028 case 0:
29 icache_disable();
wdenk38635852002-08-27 05:55:31 +000030 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000031 case 1:
32 icache_enable();
wdenk38635852002-08-27 05:55:31 +000033 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000034 case 2:
35 invalidate_icache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000036 break;
wdenk38635852002-08-27 05:55:31 +000037 }
Joe Hershberger36180d92012-10-03 10:56:17 +000038 break;
wdenk38635852002-08-27 05:55:31 +000039 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000040 printf("Instruction Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000041 icache_status() ? "ON" : "OFF");
42 return 0;
43 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000044 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000045 }
46 return 0;
47}
48
Stefan Kristiansson23498932011-10-31 18:21:12 +000049void __weak flush_dcache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000050{
Stefan Kristiansson23498932011-10-31 18:21:12 +000051 puts("No arch specific flush_dcache_all available!\n");
52 /* please define arch specific flush_dcache_all */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000053}
54
Joe Hershbergere9455fc2012-10-03 10:56:16 +000055int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000056{
57 switch (argc) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000058 case 2: /* on / off */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000059 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000060 case 0:
61 dcache_disable();
wdenk38635852002-08-27 05:55:31 +000062 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000063 case 1:
64 dcache_enable();
wdenk38635852002-08-27 05:55:31 +000065 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000066 case 2:
67 flush_dcache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000068 break;
wdenk38635852002-08-27 05:55:31 +000069 }
Joe Hershbergere9455fc2012-10-03 10:56:16 +000070 break;
wdenk38635852002-08-27 05:55:31 +000071 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000072 printf("Data (writethrough) Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000073 dcache_status() ? "ON" : "OFF");
74 return 0;
75 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000076 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000077 }
78 return 0;
wdenk38635852002-08-27 05:55:31 +000079}
80
Matthew McClintockd0c4c332011-05-24 10:09:05 +000081static int parse_argv(const char *s)
wdenk38635852002-08-27 05:55:31 +000082{
Joe Hershbergere9455fc2012-10-03 10:56:16 +000083 if (strcmp(s, "flush") == 0)
84 return 2;
85 else if (strcmp(s, "on") == 0)
86 return 1;
87 else if (strcmp(s, "off") == 0)
88 return 0;
89
90 return -1;
wdenk38635852002-08-27 05:55:31 +000091}
92
wdenk8bde7f72003-06-27 21:31:46 +000093
wdenk0d498392003-07-01 21:06:45 +000094U_BOOT_CMD(
95 icache, 2, 1, do_icache,
Peter Tyser2fb26042009-01-27 18:03:12 -060096 "enable or disable instruction cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +000097 "[on, off, flush]\n"
98 " - enable, disable, or flush instruction cache"
wdenk8bde7f72003-06-27 21:31:46 +000099);
100
wdenk0d498392003-07-01 21:06:45 +0000101U_BOOT_CMD(
102 dcache, 2, 1, do_dcache,
Peter Tyser2fb26042009-01-27 18:03:12 -0600103 "enable or disable data cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +0000104 "[on, off, flush]\n"
105 " - enable, disable, or flush data (writethrough) cache"
wdenk8bde7f72003-06-27 21:31:46 +0000106);