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Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +00001/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
5 *
6 * Configuration settings for the TI DRA7XX board.
7 * See omap5_common.h for omap5 common settings.
8 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +000010 */
11
12#ifndef __CONFIG_DRA7XX_EVM_H
13#define __CONFIG_DRA7XX_EVM_H
14
Tom Rinia8017572013-08-09 11:22:18 -040015#define CONFIG_DRA7XX
16
Lokesh Vutlad3d33da2013-08-23 17:27:04 +053017/* MMC ENV related defines */
18#define CONFIG_ENV_IS_IN_MMC
19#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
20#define CONFIG_ENV_OFFSET 0xE0000
21#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
22#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
23#define CONFIG_CMD_SAVEENV
Tom Rini9552ee32013-04-05 06:21:45 +000024
Minal Shaha13cbf52013-10-04 14:52:02 -040025#if (CONFIG_CONS_INDEX == 1)
Tom Rinia8017572013-08-09 11:22:18 -040026#define CONSOLEDEV "ttyO0"
Minal Shaha13cbf52013-10-04 14:52:02 -040027#elif (CONFIG_CONS_INDEX == 3)
28#define CONSOLEDEV "ttyO2"
29#endif
30#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
31#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
32#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Sricharan R378bd1f2013-05-30 03:19:33 +000033#define CONFIG_BAUDRATE 115200
Lokesh Vutla97405d82013-05-30 03:19:38 +000034
35#define CONFIG_SYS_OMAP_ABE_SYSCK
Dan Murphy45dbbf22013-06-11 11:22:30 -050036
Tom Rinia8017572013-08-09 11:22:18 -040037#include <configs/omap5_common.h>
Dan Murphy45dbbf22013-06-11 11:22:30 -050038
Mugunthan V Nc9be62c2013-07-08 16:04:43 +053039/* CPSW Ethernet */
Tom Rini457bb502013-08-20 08:53:54 -040040#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
Mugunthan V Nc9be62c2013-07-08 16:04:43 +053041#define CONFIG_CMD_DHCP
Tom Rini457bb502013-08-20 08:53:54 -040042#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
Mugunthan V Nc9be62c2013-07-08 16:04:43 +053043#define CONFIG_BOOTP_DNS2
44#define CONFIG_BOOTP_SEND_HOSTNAME
45#define CONFIG_BOOTP_GATEWAY
46#define CONFIG_BOOTP_SUBNETMASK
Tom Rini457bb502013-08-20 08:53:54 -040047#define CONFIG_NET_RETRY_COUNT 10
48#define CONFIG_CMD_PING
49#define CONFIG_CMD_MII
50#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
51#define CONFIG_MII /* Required in net/eth.c */
52#define CONFIG_PHY_GIGE /* per-board part of CPSW */
Mugunthan V Nc9be62c2013-07-08 16:04:43 +053053#define CONFIG_PHYLIB
54#define CONFIG_PHY_ADDR 2
55
Matt Porter247cdf02013-10-07 15:53:03 +053056/* SPI */
57#undef CONFIG_OMAP3_SPI
58#define CONFIG_TI_QSPI
59#define CONFIG_SPI_FLASH
60#define CONFIG_SPI_FLASH_SPANSION
61#define CONFIG_CMD_SF
62#define CONFIG_CMD_SPI
Poddar, Sourav2c57b032013-11-14 21:01:14 +053063#define CONFIG_SPI_FLASH_BAR
Matt Porter247cdf02013-10-07 15:53:03 +053064#define CONFIG_TI_SPI_MMAP
65#define CONFIG_SF_DEFAULT_SPEED 48000000
66#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
67
68/* SPI SPL */
69#define CONFIG_SPL_SPI_SUPPORT
70#define CONFIG_SPL_SPI_LOAD
71#define CONFIG_SPL_SPI_FLASH_SUPPORT
72#define CONFIG_SPL_SPI_BUS 0
73#define CONFIG_SPL_SPI_CS 0
74#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
75
Dan Murphy834e91a2013-10-11 12:28:17 -050076/* USB xHCI HOST */
77#define CONFIG_CMD_USB
78#define CONFIG_USB_HOST
79#define CONFIG_USB_XHCI
80#define CONFIG_USB_XHCI_OMAP
81#define CONFIG_USB_STORAGE
82#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
83
84#define CONFIG_OMAP_USB_PHY
85#define CONFIG_OMAP_USB2PHY2_HOST
86
Roger Quadros21914ee2013-11-11 16:56:44 +020087/* SATA */
88#define CONFIG_BOARD_LATE_INIT
89#define CONFIG_CMD_SCSI
90#define CONFIG_LIBATA
91#define CONFIG_SCSI_AHCI
92#define CONFIG_SCSI_AHCI_PLAT
93#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
94#define CONFIG_SYS_SCSI_MAX_LUN 1
95#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
96 CONFIG_SYS_SCSI_MAX_LUN)
97
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +000098#endif /* __CONFIG_DRA7XX_EVM_H */