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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefano Babicc67bee12010-02-05 15:11:27 +01002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
Stefano Babicc67bee12010-02-05 15:11:27 +01008 */
9
10#include <common.h>
Simon Glassd96c2602019-12-28 10:44:58 -070011#include <clock_legacy.h>
Stefano Babicc67bee12010-02-05 15:11:27 +010012#include <asm/arch/imx-regs.h>
Stefano Babice4d34492010-03-05 17:54:37 +010013#include <asm/arch/clock.h>
Simon Glass401d1c42020-10-30 21:38:53 -060014#include <asm/global_data.h>
Stefano Babicc67bee12010-02-05 15:11:27 +010015
Yangbo Lue37ac712019-06-21 11:42:28 +080016#ifdef CONFIG_FSL_ESDHC_IMX
John Rigby29565322010-12-20 18:27:51 -070017DECLARE_GLOBAL_DATA_PTR;
18#endif
19
Stefano Babicc67bee12010-02-05 15:11:27 +010020int get_clocks(void)
21{
Yangbo Lue37ac712019-06-21 11:42:28 +080022#ifdef CONFIG_FSL_ESDHC_IMX
Michael Langer5c237122012-06-14 03:44:33 +000023#ifdef CONFIG_FSL_USDHC
Benoît Thébaudeau32384652012-09-27 10:24:37 +000024#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000025 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000026#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000027 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000028#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000029 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Michael Langer5c237122012-06-14 03:44:33 +000030#else
Simon Glasse9adeca2012-12-13 20:49:05 +000031 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000032#endif
33#else
34#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000035 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000036#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000037 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000038#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +000039 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000040#else
Simon Glasse9adeca2012-12-13 20:49:05 +000041 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +000042#endif
Stefano Babicc67bee12010-02-05 15:11:27 +010043#endif
Michael Langer5c237122012-06-14 03:44:33 +000044#endif
Stefano Babicc67bee12010-02-05 15:11:27 +010045 return 0;
46}