blob: 73824e9ace63248b1bb93bb5820e9d844388a089 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamada81afa9c2017-05-15 14:26:33 +09002/*
3 * Copyright (C) 2017 Socionext Inc.
Masahiro Yamada81afa9c2017-05-15 14:26:33 +09004 */
5
Masahiro Yamadaa184fb82017-09-15 21:43:22 +09006#include <linux/bitops.h>
Masahiro Yamada81afa9c2017-05-15 14:26:33 +09007#include <linux/io.h>
8
9#include "../init.h"
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090010#include "../sc64-regs.h"
Masahiro Yamada81afa9c2017-05-15 14:26:33 +090011
12#define SDCTRL_EMMC_HW_RESET 0x59810280
13
14void uniphier_pxs3_clk_init(void)
15{
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090016 u32 tmp;
17
18 tmp = readl(SC_RSTCTRL6);
19 tmp |= BIT(8); /* Mali */
20 writel(tmp, SC_RSTCTRL6);
21
22 tmp = readl(SC_CLKCTRL6);
23 tmp |= BIT(8); /* Mali */
24 writel(tmp, SC_CLKCTRL6);
25
Masahiro Yamada81afa9c2017-05-15 14:26:33 +090026 /* TODO: use "mmc-pwrseq-emmc" */
27 writel(1, SDCTRL_EMMC_HW_RESET);
28}