Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010,2011 |
| 4 | * NVIDIA Corporation <www.nvidia.com> |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
Alexey Brodkin | 1ace402 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 10 | #include <linux/sizes.h> |
Simon Glass | 649d0ff | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 11 | |
| 12 | /* LP0 suspend / resume */ |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 13 | #define CONFIG_TEGRA_LP0 |
Simon Glass | 649d0ff | 2012-04-02 13:19:03 +0000 | [diff] [blame] | 14 | #define CONFIG_TEGRA_PMU |
| 15 | #define CONFIG_TPS6586X_POWER |
| 16 | #define CONFIG_TEGRA_CLOCK_SCALING |
| 17 | |
Allen Martin | 00a2749 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 18 | #include "tegra20-common.h" |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 19 | |
| 20 | /* High-level configuration options */ |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 21 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 22 | |
| 23 | /* Board-specific serial config */ |
Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 24 | #define CONFIG_TEGRA_ENABLE_UARTD |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 25 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
| 26 | |
Tom Warren | 0585873 | 2011-02-23 09:54:31 +0000 | [diff] [blame] | 27 | #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 28 | |
Stephen Warren | f9f2f12 | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 29 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
Stephen Warren | f9f2f12 | 2012-05-24 11:38:39 +0000 | [diff] [blame] | 30 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Stephen Warren | 573668a | 2012-07-30 10:55:45 +0000 | [diff] [blame] | 31 | #define CONFIG_SYS_MMC_ENV_PART 2 |
Simon Glass | db44ebd | 2012-02-27 10:52:52 +0000 | [diff] [blame] | 32 | |
Simon Glass | 0dd8408 | 2012-07-29 20:53:30 +0000 | [diff] [blame] | 33 | /* NAND support */ |
Simon Glass | 0dd8408 | 2012-07-29 20:53:30 +0000 | [diff] [blame] | 34 | #define CONFIG_TEGRA_NAND |
| 35 | |
| 36 | /* Max number of NAND devices */ |
| 37 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Simon Glass | ef24c38 | 2012-11-05 13:21:01 +0000 | [diff] [blame] | 38 | |
| 39 | #include "tegra-common-post.h" |
| 40 | |
Tom Warren | ee4bbbc | 2011-01-27 10:58:08 +0000 | [diff] [blame] | 41 | #endif /* __CONFIG_H */ |