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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Warrenee4bbbc2011-01-27 10:58:08 +00002/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warrenee4bbbc2011-01-27 10:58:08 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Simon Glass649d0ff2012-04-02 13:19:03 +000011
12/* LP0 suspend / resume */
Tom Warren29f3e3f2012-09-04 17:00:24 -070013#define CONFIG_TEGRA_LP0
Simon Glass649d0ff2012-04-02 13:19:03 +000014#define CONFIG_TEGRA_PMU
15#define CONFIG_TPS6586X_POWER
16#define CONFIG_TEGRA_CLOCK_SCALING
17
Allen Martin00a27492012-08-31 08:30:00 +000018#include "tegra20-common.h"
Tom Warrenee4bbbc2011-01-27 10:58:08 +000019
20/* High-level configuration options */
Tom Warren29f3e3f2012-09-04 17:00:24 -070021#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
Tom Warrenee4bbbc2011-01-27 10:58:08 +000022
23/* Board-specific serial config */
Tom Warren29f3e3f2012-09-04 17:00:24 -070024#define CONFIG_TEGRA_ENABLE_UARTD
Tom Warrenee4bbbc2011-01-27 10:58:08 +000025#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
26
Tom Warren05858732011-02-23 09:54:31 +000027#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
Tom Warrenee4bbbc2011-01-27 10:58:08 +000028
Stephen Warrenf9f2f122012-05-24 11:38:39 +000029/* Environment in eMMC, at the end of 2nd "boot sector" */
Stephen Warrenf9f2f122012-05-24 11:38:39 +000030#define CONFIG_SYS_MMC_ENV_DEV 0
Stephen Warren573668a2012-07-30 10:55:45 +000031#define CONFIG_SYS_MMC_ENV_PART 2
Simon Glassdb44ebd2012-02-27 10:52:52 +000032
Simon Glass0dd84082012-07-29 20:53:30 +000033/* NAND support */
Simon Glass0dd84082012-07-29 20:53:30 +000034#define CONFIG_TEGRA_NAND
35
36/* Max number of NAND devices */
37#define CONFIG_SYS_MAX_NAND_DEVICE 1
Simon Glassef24c382012-11-05 13:21:01 +000038
39#include "tegra-common-post.h"
40
Tom Warrenee4bbbc2011-01-27 10:58:08 +000041#endif /* __CONFIG_H */