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huang linbe1d5e02015-11-17 14:20:27 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#ifndef __CONFIG_RK3036_COMMON_H
7#define __CONFIG_RK3036_COMMON_H
8
9#include <asm/arch/hardware.h>
Jacob Chen7f35bbb2016-10-08 13:47:41 +080010#include "rockchip-common.h"
huang linbe1d5e02015-11-17 14:20:27 +080011
12#define CONFIG_SYS_NO_FLASH
13#define CONFIG_NR_DRAM_BANKS 1
14#define CONFIG_ENV_IS_NOWHERE
15#define CONFIG_ENV_SIZE 0x2000
16#define CONFIG_SYS_MAXARGS 16
17#define CONFIG_BAUDRATE 115200
18#define CONFIG_SYS_MALLOC_LEN (32 << 20)
19#define CONFIG_SYS_CBSIZE 1024
20#define CONFIG_SKIP_LOWLEVEL_INIT
21#define CONFIG_SYS_THUMB_BUILD
huang linbe1d5e02015-11-17 14:20:27 +080022
23#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
24#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
25#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
26
27#define CONFIG_SYS_NS16550
28#define CONFIG_SYS_NS16550_MEM32
29
huang linbe1d5e02015-11-17 14:20:27 +080030#define CONFIG_SYS_TEXT_BASE 0x60000000
31#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
32#define CONFIG_SYS_LOAD_ADDR 0x60800800
33#define CONFIG_SPL_STACK 0x10081fff
34#define CONFIG_SPL_TEXT_BASE 0x10081004
35
36#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
37#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
38
huang linbe1d5e02015-11-17 14:20:27 +080039/* MMC/SD IP block */
huang linbe1d5e02015-11-17 14:20:27 +080040#define CONFIG_GENERIC_MMC
huang linbe1d5e02015-11-17 14:20:27 +080041#define CONFIG_BOUNCE_BUFFER
42
huang linbe1d5e02015-11-17 14:20:27 +080043#define CONFIG_FAT_WRITE
huang linbe1d5e02015-11-17 14:20:27 +080044
huang linbe1d5e02015-11-17 14:20:27 +080045#define CONFIG_SYS_SDRAM_BASE 0x60000000
46#define CONFIG_NR_DRAM_BANKS 1
47#define SDRAM_BANK_SIZE (512UL << 20UL)
48
49#define CONFIG_SPI_FLASH
50#define CONFIG_SPI
huang linbe1d5e02015-11-17 14:20:27 +080051#define CONFIG_SPI_FLASH_GIGADEVICE
52#define CONFIG_SF_DEFAULT_SPEED 20000000
53
huang linbe1d5e02015-11-17 14:20:27 +080054#ifndef CONFIG_SPL_BUILD
Xu Ziyuand2d763f2016-07-28 11:42:34 +080055/* usb otg */
56#define CONFIG_USB_GADGET
57#define CONFIG_USB_GADGET_DUALSPEED
58#define CONFIG_USB_GADGET_DWC2_OTG
59#define CONFIG_USB_GADGET_VBUS_DRAW 0
60
61/* fastboot */
62#define CONFIG_CMD_FASTBOOT
63#define CONFIG_USB_FUNCTION_FASTBOOT
64#define CONFIG_FASTBOOT_FLASH
65#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
66#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
67#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
68
jacob2.chene73e5fc2016-08-30 01:26:14 +080069/* usb mass storage */
70#define CONFIG_USB_FUNCTION_MASS_STORAGE
71#define CONFIG_CMD_USB_MASS_STORAGE
72
Xu Ziyuand2d763f2016-07-28 11:42:34 +080073#define CONFIG_USB_GADGET_DOWNLOAD
74#define CONFIG_G_DNL_MANUFACTURER "Rockchip"
75#define CONFIG_G_DNL_VENDOR_NUM 0x2207
76#define CONFIG_G_DNL_PRODUCT_NUM 0x310a
77
Kever Yang1e352122016-11-08 18:13:39 +080078/* usb host */
79#ifdef CONFIG_CMD_USB
80#define CONFIG_USB_DWC2
81#define CONFIG_USB_HOST_ETHER
82#define CONFIG_USB_ETHER_SMSC95XX
83#define CONFIG_USB_ETHER_ASIX
84#endif
huang linbe1d5e02015-11-17 14:20:27 +080085#define ENV_MEM_LAYOUT_SETTINGS \
86 "scriptaddr=0x60000000\0" \
87 "pxefile_addr_r=0x60100000\0" \
88 "fdt_addr_r=0x61f00000\0" \
89 "kernel_addr_r=0x62000000\0" \
90 "ramdisk_addr_r=0x64000000\0"
91
huang linbe1d5e02015-11-17 14:20:27 +080092#include <config_distro_bootcmd.h>
93
94/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
95 * so limit the fdt reallocation to that */
96#define CONFIG_EXTRA_ENV_SETTINGS \
97 "fdt_high=0x7fffffff\0" \
Jacob Chen73a85982016-09-19 18:46:25 +080098 "partitions=" PARTS_DEFAULT \
huang linbe1d5e02015-11-17 14:20:27 +080099 ENV_MEM_LAYOUT_SETTINGS \
100 BOOTENV
101#endif
102
Jacob Chen67171e12016-09-19 18:46:28 +0800103#define CONFIG_PREBOOT
104
huang linbe1d5e02015-11-17 14:20:27 +0800105#endif