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wdenkb6508512004-10-10 18:03:33 +00001/* ---------------------------------------------------------------------------- */
2/* ATMEL Microcontroller Software Support - ROUSSET - */
3/* ---------------------------------------------------------------------------- */
4/* The software is delivered "AS IS" without warranty or condition of any */
5/* kind, either express, implied or statutory. This includes without */
6/* limitation any warranty or condition with respect to merchantability or */
7/* fitness for any particular purpose, or against the infringements of */
8/* intellectual property rights of others. */
9/* ---------------------------------------------------------------------------- */
10/* File Name : at91rm9200_i2c.h */
11/* Object : AT91RM9200 / TWI definitions */
12/* Generated : AT91 SW Application Group 12/03/2002 (10:48:02) */
13/* */
14/* ---------------------------------------------------------------------------- */
wdenk2cbe5712004-10-10 17:05:18 +000015
16#ifndef AT91RM9200_TWI_H
17#define AT91RM9200_TWI_H
18
wdenkb6508512004-10-10 18:03:33 +000019/* ******************************************************************************/
20/* SOFTWARE API DEFINITION FOR Two-wire Interface */
21/* ******************************************************************************/
wdenk2cbe5712004-10-10 17:05:18 +000022#ifndef __ASSEMBLY__
23
24typedef struct _AT91S_TWI {
wdenkb6508512004-10-10 18:03:33 +000025 AT91_REG TWI_CR; /* Control Register */
26 AT91_REG TWI_MMR; /* Master Mode Register */
27 AT91_REG TWI_SMR; /* Slave Mode Register */
28 AT91_REG TWI_IADR; /* Internal Address Register */
29 AT91_REG TWI_CWGR; /* Clock Waveform Generator Register */
30 AT91_REG Reserved0[3];
31 AT91_REG TWI_SR; /* Status Register */
32 AT91_REG TWI_IER; /* Interrupt Enable Register */
33 AT91_REG TWI_IDR; /* Interrupt Disable Register */
34 AT91_REG TWI_IMR; /* Interrupt Mask Register */
35 AT91_REG TWI_RHR; /* Receive Holding Register */
36 AT91_REG TWI_THR; /* Transmit Holding Register */
37 AT91_REG Reserved1[50];
38 AT91_REG TWI_RPR; /* Receive Pointer Register */
39 AT91_REG TWI_RCR; /* Receive Counter Register */
40 AT91_REG TWI_TPR; /* Transmit Pointer Register */
41 AT91_REG TWI_TCR; /* Transmit Counter Register */
42 AT91_REG TWI_RNPR; /* Receive Next Pointer Register */
43 AT91_REG TWI_RNCR; /* Receive Next Counter Register */
44 AT91_REG TWI_TNPR; /* Transmit Next Pointer Register */
45 AT91_REG TWI_TNCR; /* Transmit Next Counter Register */
46 AT91_REG TWI_PTCR; /* PDC Transfer Control Register */
47 AT91_REG TWI_PTSR; /* PDC Transfer Status Register */
wdenk2cbe5712004-10-10 17:05:18 +000048} AT91S_TWI, *AT91PS_TWI;
49
50#endif
51
wdenkb6508512004-10-10 18:03:33 +000052/* -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- */
53#define AT91C_TWI_START (0x1 << 0) /* (TWI) Send a START Condition */
54#define AT91C_TWI_STOP (0x1 << 1) /* (TWI) Send a STOP Condition */
55#define AT91C_TWI_MSEN (0x1 << 2) /* (TWI) TWI Master Transfer Enabled */
56#define AT91C_TWI_MSDIS (0x1 << 3) /* (TWI) TWI Master Transfer Disabled */
57#define AT91C_TWI_SVEN (0x1 << 4) /* (TWI) TWI Slave Transfer Enabled */
58#define AT91C_TWI_SVDIS (0x1 << 5) /* (TWI) TWI Slave Transfer Disabled */
59#define AT91C_TWI_SWRST (0x1 << 7) /* (TWI) Software Reset */
60/* -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- */
61#define AT91C_TWI_IADRSZ (0x3 << 8) /* (TWI) Internal Device Address Size */
62#define AT91C_TWI_IADRSZ_NO (0x0 << 8) /* (TWI) No internal device address */
63#define AT91C_TWI_IADRSZ_1_BYTE (0x1 << 8) /* (TWI) One-byte internal device address */
64#define AT91C_TWI_IADRSZ_2_BYTE (0x2 << 8) /* (TWI) Two-byte internal device address */
65#define AT91C_TWI_IADRSZ_3_BYTE (0x3 << 8) /* (TWI) Three-byte internal device address */
66#define AT91C_TWI_MREAD (0x1 << 12) /* (TWI) Master Read Direction */
67#define AT91C_TWI_DADR (0x7F << 6) /* (TWI) Device Address */
68/* -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register -------- */
69#define AT91C_TWI_SADR (0x7F << 16) /* (TWI) Slave Device Address */
70/* -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- */
71#define AT91C_TWI_CLDIV (0xFF << 0) /* (TWI) Clock Low Divider */
72#define AT91C_TWI_CHDIV (0xFF << 8) /* (TWI) Clock High Divider */
73#define AT91C_TWI_CKDIV (0x7 << 16) /* (TWI) Clock Divider */
74/* -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- */
75#define AT91C_TWI_TXCOMP (0x1 << 0) /* (TWI) Transmission Completed */
76#define AT91C_TWI_RXRDY (0x1 << 1) /* (TWI) Receive holding register ReaDY */
77#define AT91C_TWI_TXRDY (0x1 << 2) /* (TWI) Transmit holding register ReaDY*/
78#define AT91C_TWI_SVREAD (0x1 << 3) /* (TWI) Slave Read */
79#define AT91C_TWI_SVACC (0x1 << 4) /* (TWI) Slave Access */
80#define AT91C_TWI_GCACC (0x1 << 5) /* (TWI) General Call Access */
81#define AT91C_TWI_OVRE (0x1 << 6) /* (TWI) Overrun Error */
82#define AT91C_TWI_UNRE (0x1 << 7) /* (TWI) Underrun Error */
83#define AT91C_TWI_NACK (0x1 << 8) /* (TWI) Not Acknowledged */
84#define AT91C_TWI_ARBLST (0x1 << 9) /* (TWI) Arbitration Lost */
85/* -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- */
86/* -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register ------- */
87/* -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- */
wdenk2cbe5712004-10-10 17:05:18 +000088
89/*
90 i2c Support for Atmel's AT91RM9200 Two-Wire Interface
91
92 (c) Rick Bronson
93
94 This program is free software; you can redistribute it and/or modify
95 it under the terms of the GNU General Public License as published by
96 the Free Software Foundation; either version 2 of the License, or
97 (at your option) any later version.
98
99 This program is distributed in the hope that it will be useful,
100 but WITHOUT ANY WARRANTY; without even the implied warranty of
101 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
102 GNU General Public License for more details.
103
104 You should have received a copy of the GNU General Public License
105 along with this program; if not, write to the Free Software
106 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
107*/
108
109#ifndef AT91_I2C_H
110#define AT91_I2C_H
111
112#define AT91C_TWI_CLOCK 100000
113#define AT91C_TWI_SCLOCK (10 * AT91C_MASTER_CLOCK / AT91C_TWI_CLOCK)
114#define AT91C_TWI_CKDIV1 (2 << 16) /* TWI clock divider. NOTE: see Errata #22 */
115
116#if (AT91C_TWI_SCLOCK % 10) >= 5
117#define AT91C_TWI_CLDIV2 ((AT91C_TWI_SCLOCK / 10) - 5)
118#else
119#define AT91C_TWI_CLDIV2 ((AT91C_TWI_SCLOCK / 10) - 6)
120#endif
121#define AT91C_TWI_CLDIV3 ((AT91C_TWI_CLDIV2 + (4 - AT91C_TWI_CLDIV2 % 4)) >> 2)
122
wdenkb6508512004-10-10 18:03:33 +0000123#define AT91C_EEPROM_I2C_ADDRESS (0x50 << 16)
wdenk2cbe5712004-10-10 17:05:18 +0000124
wdenkb6508512004-10-10 18:03:33 +0000125#endif /* __ASSEMBLY__ */
126#endif /* AT91RM9200_TWI_H */