blob: 294a59df77dac3187dcbc06f1fd065bd03446717 [file] [log] [blame]
Michal Simek9755e3d2019-01-21 15:25:02 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2019 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
5 */
6
7#include <common.h>
Michal Simekfc274a52019-12-19 17:45:15 +01008#include <asm/sections.h>
Michal Simek9755e3d2019-01-21 15:25:02 +01009#include <dm/uclass.h>
10#include <i2c.h>
Michal Simeka29511e2020-04-08 10:51:36 +020011#include <linux/sizes.h>
Michal Simek80fdef12020-03-31 12:39:37 +020012#include "board.h"
Michal Simek9755e3d2019-01-21 15:25:02 +010013
Michal Simek829e8c72019-01-21 16:29:07 +010014int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
15{
16 int ret = -EINVAL;
17
18#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
19 struct udevice *dev;
20 ofnode eeprom;
21
22 eeprom = ofnode_get_chosen_node("xlnx,eeprom");
23 if (!ofnode_valid(eeprom))
24 return -ENODEV;
25
26 debug("%s: Path to EEPROM %s\n", __func__,
Simon Glass14ca9f72020-01-27 08:49:43 -070027 ofnode_read_chosen_string("xlnx,eeprom"));
Michal Simek829e8c72019-01-21 16:29:07 +010028
29 ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
30 if (ret)
31 return ret;
32
33 ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
34 if (ret)
35 debug("%s: I2C EEPROM MAC address read failed\n", __func__);
36 else
37 debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
38#endif
39
40 return ret;
41}
Ibai Erkiagafec657b2019-10-02 15:57:36 +010042
Michal Simekfc274a52019-12-19 17:45:15 +010043#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
Ibai Erkiagafec657b2019-10-02 15:57:36 +010044void *board_fdt_blob_setup(void)
45{
Michal Simek453bb772020-03-19 10:23:56 +010046 static void *fdt_blob;
47
48#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
49 fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
Ibai Erkiagafec657b2019-10-02 15:57:36 +010050
Michal Simekfc274a52019-12-19 17:45:15 +010051 if (fdt_magic(fdt_blob) == FDT_MAGIC)
52 return fdt_blob;
Ibai Erkiagafec657b2019-10-02 15:57:36 +010053
Michal Simekfc274a52019-12-19 17:45:15 +010054 debug("DTB is not passed via %p\n", fdt_blob);
Michal Simek453bb772020-03-19 10:23:56 +010055#endif
Michal Simekfc274a52019-12-19 17:45:15 +010056
57#ifdef CONFIG_SPL_BUILD
58 /* FDT is at end of BSS unless it is in a different memory region */
59 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
60 fdt_blob = (ulong *)&_image_binary_end;
61 else
62 fdt_blob = (ulong *)&__bss_end;
63#else
64 /* FDT is at end of image */
65 fdt_blob = (ulong *)&_end;
66#endif
67
68 if (fdt_magic(fdt_blob) == FDT_MAGIC)
69 return fdt_blob;
70
71 debug("DTB is also not passed via %p\n", fdt_blob);
72
73 return NULL;
Ibai Erkiagafec657b2019-10-02 15:57:36 +010074}
75#endif
Michal Simek80fdef12020-03-31 12:39:37 +020076
77int board_late_init_xilinx(void)
78{
Michal Simeka29511e2020-04-08 10:51:36 +020079 ulong initrd_hi;
80
Michal Simek80fdef12020-03-31 12:39:37 +020081 env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
82
Michal Simeka29511e2020-04-08 10:51:36 +020083 initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
84 initrd_hi = round_down(initrd_hi, SZ_16M);
85 env_set_addr("initrd_high", (void *)initrd_hi);
86
Michal Simek80fdef12020-03-31 12:39:37 +020087 return 0;
88}