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Sricharan508a58f2011-11-15 09:49:55 -05001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated, <www.ti.com>
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Sricharan508a58f2011-11-15 09:49:55 -05008 */
9#include <common.h>
Nishanth Menoncb199102013-03-26 05:20:54 +000010#include <palmas.h>
Sricharan508a58f2011-11-15 09:49:55 -050011#include <asm/arch/sys_proto.h>
12#include <asm/arch/mmc_host_def.h>
Dan Murphyfdce7b62013-07-11 13:10:28 -050013#include <tca642x.h>
Sricharan508a58f2011-11-15 09:49:55 -050014
15#include "mux_data.h"
16
Dan Murphy96805532013-08-26 08:54:53 -050017#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
Dan Murphye9024ef2014-02-03 06:59:02 -060018#include <sata.h>
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050019#include <usb.h>
Dan Murphy1572ead2013-08-01 14:06:02 -050020#include <asm/gpio.h>
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050021#include <asm/arch/clock.h>
22#include <asm/arch/ehci.h>
23#include <asm/ehci-omap.h>
Roger Quadrosafdc6322013-11-11 16:56:42 +020024#include <asm/arch/sata.h>
Dan Murphy04025b42013-08-01 14:06:00 -050025
26#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
27#define DIE_ID_REG_OFFSET 0x200
28
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050029#endif
30
Sricharan508a58f2011-11-15 09:49:55 -050031DECLARE_GLOBAL_DATA_PTR;
32
33const struct omap_sysinfo sysinfo = {
Dan Murphy5a7bd382013-08-01 14:05:56 -050034 "Board: OMAP5432 uEVM\n"
Sricharan508a58f2011-11-15 09:49:55 -050035};
36
37/**
Dan Murphyfdce7b62013-07-11 13:10:28 -050038 * @brief tca642x_init - uEVM default values for the GPIO expander
39 * input reg, output reg, polarity reg, configuration reg
40 */
41struct tca642x_bank_info tca642x_init[] = {
42 { .input_reg = 0x00,
43 .output_reg = 0x04,
44 .polarity_reg = 0x00,
45 .configuration_reg = 0x80 },
46 { .input_reg = 0x00,
47 .output_reg = 0x00,
48 .polarity_reg = 0x00,
49 .configuration_reg = 0xff },
50 { .input_reg = 0x00,
51 .output_reg = 0x00,
52 .polarity_reg = 0x00,
53 .configuration_reg = 0x40 },
54};
55
56/**
Sricharan508a58f2011-11-15 09:49:55 -050057 * @brief board_init
58 *
59 * @return 0
60 */
61int board_init(void)
62{
63 gpmc_init();
64 gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
65 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
66
Dan Murphyfdce7b62013-07-11 13:10:28 -050067 tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
68
Sricharan508a58f2011-11-15 09:49:55 -050069 return 0;
70}
71
72int board_eth_init(bd_t *bis)
73{
74 return 0;
75}
76
Dan Murphy96805532013-08-26 08:54:53 -050077#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
78static void enable_host_clocks(void)
79{
80 int auxclk;
81 int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
82 OPTFCLKEN_HSIC480M_P3_CLK |
83 OPTFCLKEN_HSIC60M_P2_CLK |
84 OPTFCLKEN_HSIC480M_P2_CLK |
85 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
86
87 /* Enable port 2 and 3 clocks*/
88 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
89
90 /* Enable port 2 and 3 usb host ports tll clocks*/
91 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
92 (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
93#ifdef CONFIG_USB_XHCI_OMAP
94 /* Enable the USB OTG Super speed clocks */
95 setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
96 (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
97#endif
98
99 auxclk = readl((*prcm)->scrm_auxclk1);
100 /* Request auxilary clock */
101 auxclk |= AUXCLK_ENABLE_MASK;
102 writel(auxclk, (*prcm)->scrm_auxclk1);
103}
104#endif
105
Sricharan508a58f2011-11-15 09:49:55 -0500106/**
107 * @brief misc_init_r - Configure EVM board specific configurations
108 * such as power configurations, ethernet initialization as phase2 of
109 * boot sequence
110 *
111 * @return 0
112 */
113int misc_init_r(void)
114{
Dan Murphyea02b652013-10-11 12:28:19 -0500115 int reg;
Nishanth Menon8a0c6d62014-03-28 11:00:04 -0500116 u32 id[4];
Dan Murphyea02b652013-10-11 12:28:19 -0500117
Nishanth Menoncb199102013-03-26 05:20:54 +0000118#ifdef CONFIG_PALMAS_POWER
Nishanth Menon12733882013-03-26 05:20:55 +0000119 palmas_init_settings();
Sricharan508a58f2011-11-15 09:49:55 -0500120#endif
Dan Murphy96805532013-08-26 08:54:53 -0500121
Nishanth Menon8a0c6d62014-03-28 11:00:04 -0500122 reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
Dan Murphyea02b652013-10-11 12:28:19 -0500123
Nishanth Menon8a0c6d62014-03-28 11:00:04 -0500124 id[0] = readl(reg);
125 id[1] = readl(reg + 0x8);
126 id[2] = readl(reg + 0xC);
127 id[3] = readl(reg + 0x10);
128 usb_fake_mac_from_die_id(id);
Dan Murphyea02b652013-10-11 12:28:19 -0500129
Sricharan508a58f2011-11-15 09:49:55 -0500130 return 0;
131}
132
133void set_muxconf_regs_essential(void)
134{
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000135 do_set_mux((*ctrl)->control_padconf_core_base,
136 core_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500137 sizeof(core_padconf_array_essential) /
138 sizeof(struct pad_conf_entry));
139
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000140 do_set_mux((*ctrl)->control_padconf_wkup_base,
141 wkup_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500142 sizeof(wkup_padconf_array_essential) /
143 sizeof(struct pad_conf_entry));
144}
145
Sricharan508a58f2011-11-15 09:49:55 -0500146#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
147int board_mmc_init(bd_t *bis)
148{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000149 omap_mmc_init(0, 0, 0, -1, -1);
150 omap_mmc_init(1, 0, 0, -1, -1);
Sricharan508a58f2011-11-15 09:49:55 -0500151 return 0;
152}
153#endif
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500154
155#ifdef CONFIG_USB_EHCI
156static struct omap_usbhs_board_data usbhs_bdata = {
157 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
158 .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
159 .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
160};
161
Troy Kisky127efc42013-10-10 15:27:57 -0700162int ehci_hcd_init(int index, enum usb_init_type init,
163 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500164{
165 int ret;
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500166
167 enable_host_clocks();
168
Mateusz Zalega16297cf2013-10-04 19:22:26 +0200169 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500170 if (ret < 0) {
171 puts("Failed to initialize ehci\n");
172 return ret;
173 }
174
175 return 0;
176}
177
178int ehci_hcd_stop(void)
179{
180 int ret;
181
182 ret = omap_ehci_hcd_stop();
183 return ret;
184}
Dan Murphy1572ead2013-08-01 14:06:02 -0500185
186void usb_hub_reset_devices(int port)
187{
188 /* The LAN9730 needs to be reset after the port power has been set. */
189 if (port == 3) {
190 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
191 udelay(10);
192 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
193 }
194}
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500195#endif
Dan Murphy96805532013-08-26 08:54:53 -0500196
197#ifdef CONFIG_USB_XHCI_OMAP
198/**
199 * @brief board_usb_init - Configure EVM board specific configurations
200 * for the LDO's and clocks for the USB blocks.
201 *
202 * @return 0
203 */
Troy Kisky7e575c42013-10-22 14:27:17 -0700204int board_usb_init(int index, enum usb_init_type init)
Dan Murphy96805532013-08-26 08:54:53 -0500205{
206 int ret;
207#ifdef CONFIG_PALMAS_USB_SS_PWR
208 ret = palmas_enable_ss_ldo();
209#endif
210
211 enable_host_clocks();
212
213 return 0;
214}
215#endif