Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Texas Instruments Incorporated, <www.ti.com> |
| 4 | * Aneesh V <aneesh@ti.com> |
| 5 | * Steve Sakoman <steve@sakoman.com> |
| 6 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 8 | */ |
| 9 | #include <common.h> |
Nishanth Menon | cb19910 | 2013-03-26 05:20:54 +0000 | [diff] [blame] | 10 | #include <palmas.h> |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 11 | #include <asm/arch/sys_proto.h> |
| 12 | #include <asm/arch/mmc_host_def.h> |
Dan Murphy | fdce7b6 | 2013-07-11 13:10:28 -0500 | [diff] [blame] | 13 | #include <tca642x.h> |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 14 | |
| 15 | #include "mux_data.h" |
| 16 | |
Dan Murphy | 9680553 | 2013-08-26 08:54:53 -0500 | [diff] [blame] | 17 | #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP) |
Dan Murphy | e9024ef | 2014-02-03 06:59:02 -0600 | [diff] [blame] | 18 | #include <sata.h> |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 19 | #include <usb.h> |
Dan Murphy | 1572ead | 2013-08-01 14:06:02 -0500 | [diff] [blame] | 20 | #include <asm/gpio.h> |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 21 | #include <asm/arch/clock.h> |
| 22 | #include <asm/arch/ehci.h> |
| 23 | #include <asm/ehci-omap.h> |
Roger Quadros | afdc632 | 2013-11-11 16:56:42 +0200 | [diff] [blame] | 24 | #include <asm/arch/sata.h> |
Dan Murphy | 04025b4 | 2013-08-01 14:06:00 -0500 | [diff] [blame] | 25 | |
| 26 | #define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) |
| 27 | #define DIE_ID_REG_OFFSET 0x200 |
| 28 | |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 29 | #endif |
| 30 | |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
| 33 | const struct omap_sysinfo sysinfo = { |
Dan Murphy | 5a7bd38 | 2013-08-01 14:05:56 -0500 | [diff] [blame] | 34 | "Board: OMAP5432 uEVM\n" |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 35 | }; |
| 36 | |
| 37 | /** |
Dan Murphy | fdce7b6 | 2013-07-11 13:10:28 -0500 | [diff] [blame] | 38 | * @brief tca642x_init - uEVM default values for the GPIO expander |
| 39 | * input reg, output reg, polarity reg, configuration reg |
| 40 | */ |
| 41 | struct tca642x_bank_info tca642x_init[] = { |
| 42 | { .input_reg = 0x00, |
| 43 | .output_reg = 0x04, |
| 44 | .polarity_reg = 0x00, |
| 45 | .configuration_reg = 0x80 }, |
| 46 | { .input_reg = 0x00, |
| 47 | .output_reg = 0x00, |
| 48 | .polarity_reg = 0x00, |
| 49 | .configuration_reg = 0xff }, |
| 50 | { .input_reg = 0x00, |
| 51 | .output_reg = 0x00, |
| 52 | .polarity_reg = 0x00, |
| 53 | .configuration_reg = 0x40 }, |
| 54 | }; |
| 55 | |
| 56 | /** |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 57 | * @brief board_init |
| 58 | * |
| 59 | * @return 0 |
| 60 | */ |
| 61 | int board_init(void) |
| 62 | { |
| 63 | gpmc_init(); |
| 64 | gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM; |
| 65 | gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ |
| 66 | |
Dan Murphy | fdce7b6 | 2013-07-11 13:10:28 -0500 | [diff] [blame] | 67 | tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init); |
| 68 | |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 69 | return 0; |
| 70 | } |
| 71 | |
| 72 | int board_eth_init(bd_t *bis) |
| 73 | { |
| 74 | return 0; |
| 75 | } |
| 76 | |
Dan Murphy | 9680553 | 2013-08-26 08:54:53 -0500 | [diff] [blame] | 77 | #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP) |
| 78 | static void enable_host_clocks(void) |
| 79 | { |
| 80 | int auxclk; |
| 81 | int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK | |
| 82 | OPTFCLKEN_HSIC480M_P3_CLK | |
| 83 | OPTFCLKEN_HSIC60M_P2_CLK | |
| 84 | OPTFCLKEN_HSIC480M_P2_CLK | |
| 85 | OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK); |
| 86 | |
| 87 | /* Enable port 2 and 3 clocks*/ |
| 88 | setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val); |
| 89 | |
| 90 | /* Enable port 2 and 3 usb host ports tll clocks*/ |
| 91 | setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, |
| 92 | (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE)); |
| 93 | #ifdef CONFIG_USB_XHCI_OMAP |
| 94 | /* Enable the USB OTG Super speed clocks */ |
| 95 | setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl, |
| 96 | (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW)); |
| 97 | #endif |
| 98 | |
| 99 | auxclk = readl((*prcm)->scrm_auxclk1); |
| 100 | /* Request auxilary clock */ |
| 101 | auxclk |= AUXCLK_ENABLE_MASK; |
| 102 | writel(auxclk, (*prcm)->scrm_auxclk1); |
| 103 | } |
| 104 | #endif |
| 105 | |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 106 | /** |
| 107 | * @brief misc_init_r - Configure EVM board specific configurations |
| 108 | * such as power configurations, ethernet initialization as phase2 of |
| 109 | * boot sequence |
| 110 | * |
| 111 | * @return 0 |
| 112 | */ |
| 113 | int misc_init_r(void) |
| 114 | { |
Dan Murphy | ea02b65 | 2013-10-11 12:28:19 -0500 | [diff] [blame] | 115 | int reg; |
Nishanth Menon | 8a0c6d6 | 2014-03-28 11:00:04 -0500 | [diff] [blame] | 116 | u32 id[4]; |
Dan Murphy | ea02b65 | 2013-10-11 12:28:19 -0500 | [diff] [blame] | 117 | |
Nishanth Menon | cb19910 | 2013-03-26 05:20:54 +0000 | [diff] [blame] | 118 | #ifdef CONFIG_PALMAS_POWER |
Nishanth Menon | 1273388 | 2013-03-26 05:20:55 +0000 | [diff] [blame] | 119 | palmas_init_settings(); |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 120 | #endif |
Dan Murphy | 9680553 | 2013-08-26 08:54:53 -0500 | [diff] [blame] | 121 | |
Nishanth Menon | 8a0c6d6 | 2014-03-28 11:00:04 -0500 | [diff] [blame] | 122 | reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET; |
Dan Murphy | ea02b65 | 2013-10-11 12:28:19 -0500 | [diff] [blame] | 123 | |
Nishanth Menon | 8a0c6d6 | 2014-03-28 11:00:04 -0500 | [diff] [blame] | 124 | id[0] = readl(reg); |
| 125 | id[1] = readl(reg + 0x8); |
| 126 | id[2] = readl(reg + 0xC); |
| 127 | id[3] = readl(reg + 0x10); |
| 128 | usb_fake_mac_from_die_id(id); |
Dan Murphy | ea02b65 | 2013-10-11 12:28:19 -0500 | [diff] [blame] | 129 | |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 130 | return 0; |
| 131 | } |
| 132 | |
| 133 | void set_muxconf_regs_essential(void) |
| 134 | { |
Lokesh Vutla | 9239f5b | 2013-05-30 02:54:30 +0000 | [diff] [blame] | 135 | do_set_mux((*ctrl)->control_padconf_core_base, |
| 136 | core_padconf_array_essential, |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 137 | sizeof(core_padconf_array_essential) / |
| 138 | sizeof(struct pad_conf_entry)); |
| 139 | |
Lokesh Vutla | 9239f5b | 2013-05-30 02:54:30 +0000 | [diff] [blame] | 140 | do_set_mux((*ctrl)->control_padconf_wkup_base, |
| 141 | wkup_padconf_array_essential, |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 142 | sizeof(wkup_padconf_array_essential) / |
| 143 | sizeof(struct pad_conf_entry)); |
| 144 | } |
| 145 | |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 146 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) |
| 147 | int board_mmc_init(bd_t *bis) |
| 148 | { |
Nikita Kiryanov | e3913f5 | 2012-12-03 02:19:47 +0000 | [diff] [blame] | 149 | omap_mmc_init(0, 0, 0, -1, -1); |
| 150 | omap_mmc_init(1, 0, 0, -1, -1); |
Sricharan | 508a58f | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 151 | return 0; |
| 152 | } |
| 153 | #endif |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 154 | |
| 155 | #ifdef CONFIG_USB_EHCI |
| 156 | static struct omap_usbhs_board_data usbhs_bdata = { |
| 157 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, |
| 158 | .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, |
| 159 | .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, |
| 160 | }; |
| 161 | |
Troy Kisky | 127efc4 | 2013-10-10 15:27:57 -0700 | [diff] [blame] | 162 | int ehci_hcd_init(int index, enum usb_init_type init, |
| 163 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 164 | { |
| 165 | int ret; |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 166 | |
| 167 | enable_host_clocks(); |
| 168 | |
Mateusz Zalega | 16297cf | 2013-10-04 19:22:26 +0200 | [diff] [blame] | 169 | ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 170 | if (ret < 0) { |
| 171 | puts("Failed to initialize ehci\n"); |
| 172 | return ret; |
| 173 | } |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | int ehci_hcd_stop(void) |
| 179 | { |
| 180 | int ret; |
| 181 | |
| 182 | ret = omap_ehci_hcd_stop(); |
| 183 | return ret; |
| 184 | } |
Dan Murphy | 1572ead | 2013-08-01 14:06:02 -0500 | [diff] [blame] | 185 | |
| 186 | void usb_hub_reset_devices(int port) |
| 187 | { |
| 188 | /* The LAN9730 needs to be reset after the port power has been set. */ |
| 189 | if (port == 3) { |
| 190 | gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0); |
| 191 | udelay(10); |
| 192 | gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1); |
| 193 | } |
| 194 | } |
Dan Murphy | 5e5cfaf | 2013-08-01 14:05:59 -0500 | [diff] [blame] | 195 | #endif |
Dan Murphy | 9680553 | 2013-08-26 08:54:53 -0500 | [diff] [blame] | 196 | |
| 197 | #ifdef CONFIG_USB_XHCI_OMAP |
| 198 | /** |
| 199 | * @brief board_usb_init - Configure EVM board specific configurations |
| 200 | * for the LDO's and clocks for the USB blocks. |
| 201 | * |
| 202 | * @return 0 |
| 203 | */ |
Troy Kisky | 7e575c4 | 2013-10-22 14:27:17 -0700 | [diff] [blame] | 204 | int board_usb_init(int index, enum usb_init_type init) |
Dan Murphy | 9680553 | 2013-08-26 08:54:53 -0500 | [diff] [blame] | 205 | { |
| 206 | int ret; |
| 207 | #ifdef CONFIG_PALMAS_USB_SS_PWR |
| 208 | ret = palmas_enable_ss_ldo(); |
| 209 | #endif |
| 210 | |
| 211 | enable_host_clocks(); |
| 212 | |
| 213 | return 0; |
| 214 | } |
| 215 | #endif |