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Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
Sergey Kubushync74b2102007-08-10 20:26:18 +020022
23/*
24 * Define this to make U-Boot skip low level initialization when loaded
25 * by initial bootloader. Not required by NAND U-Boot version but IS
26 * required for a NOR version used to burn the real NOR U-Boot into
27 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
28 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
29 * NOR U-Boot is loaded directly from Flash so it must perform all the
30 * low level initialization itself. NAND version is loaded by an initial
31 * bootloader (UBL in TI-ese) that performs such an initialization so it's
32 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
33 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
34 * performing low level init prior to loading. All that means we can NOT use
35 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
36 * we can NOT use NOR version because it performs low level initialization
37 * effectively destroying itself in DDR memory. That's why a separate NOR
38 * version with this define is needed. It is loaded via UART, then one uses
39 * it to somehow download a proper NOR version built WITHOUT this define to
40 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
41 * NOR support into the initial bootloader so it won't be needed but DaVinci
42 * static RAM might be too small for this (I have something like 2Kbytes left
43 * as of now, without NOR support) so this might've not happened...
44 *
45#define CONFIG_NOR_UART_BOOT
46 */
47
48/*=======*/
49/* Board */
50/*=======*/
51#define SONATA_BOARD
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_NAND_SMALLPAGE
53#define CONFIG_SYS_USE_NOR
Christian Riescheccb2132011-11-19 00:45:43 +000054#define MACH_TYPE_SONATA 1254
55#define CONFIG_MACH_TYPE MACH_TYPE_SONATA
Sergey Kubushync74b2102007-08-10 20:26:18 +020056/*===================*/
57/* SoC Configuration */
58/*===================*/
59#define CONFIG_ARM926EJS /* arm926ejs CPU core */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
61#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
62#define CONFIG_SYS_HZ 1000
David Brownellf7904362009-05-15 23:44:08 +020063#define CONFIG_SOC_DM644X
Sergey Kubushync74b2102007-08-10 20:26:18 +020064/*====================================================*/
65/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
66/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
67/*====================================================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
69#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
70#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
71#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Sergey Kubushync74b2102007-08-10 20:26:18 +020072/*=============*/
73/* Memory Info */
74/*=============*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
77#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
Sergey Kubushync74b2102007-08-10 20:26:18 +020078#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
Sergey Kubushync74b2102007-08-10 20:26:18 +020079#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
80#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
81#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
82/*====================*/
83/* Serial Driver info */
84/*====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
David Brownell7ee38c02009-04-12 15:38:06 -070087#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
David Brownell7239c5da2009-04-12 15:40:16 -070089#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
Sergey Kubushync74b2102007-08-10 20:26:18 +020090#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
91#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Sergey Kubushync74b2102007-08-10 20:26:18 +020092/*===================*/
93/* I2C Configuration */
94/*===================*/
95#define CONFIG_HARD_I2C
96#define CONFIG_DRIVER_DAVINCI_I2C
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
98#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
Sergey Kubushync74b2102007-08-10 20:26:18 +020099/*==================================*/
100/* Network & Ethernet Configuration */
101/*==================================*/
102#define CONFIG_DRIVER_TI_EMAC
103#define CONFIG_MII
104#define CONFIG_BOOTP_DEFAULT
105#define CONFIG_BOOTP_DNS
106#define CONFIG_BOOTP_DNS2
107#define CONFIG_BOOTP_SEND_HOSTNAME
108#define CONFIG_NET_RETRY_COUNT 10
109/*=====================*/
110/* Flash & Environment */
111/*=====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112#ifdef CONFIG_SYS_USE_NAND
Jean-Christophe PLAGNIOL-VILLARDee4f3e22009-03-30 18:58:39 +0200113#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -0500114#define CONFIG_SYS_NAND_CS 2
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200115#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_NO_FLASH
Wolfgang Denkb6e7bd92010-10-05 21:17:28 +0200117#define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200118#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200119#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400120#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200121#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_NAND_BASE 0x02000000
123#define CONFIG_SYS_NAND_HW_ECC
124#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200125#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200127#ifdef CONFIG_NOR_UART_BOOT
128#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200129#else
130#undef CONFIG_SKIP_LOWLEVEL_INIT
Sergey Kubushync74b2102007-08-10 20:26:18 +0200131#endif
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200132#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#undef CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200134#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_FLASH_CFI
136#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
137#define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */
138#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2)
Sandeep Paulrajf3d5d312010-12-29 14:42:56 -0500139#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200140#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200142#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
144#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200145#endif
146/*==============================*/
147/* U-Boot general configuration */
148/*==============================*/
Sergey Kubushync74b2102007-08-10 20:26:18 +0200149#define CONFIG_MISC_INIT_R
150#undef CONFIG_BOOTDELAY
151#define CONFIG_BOOTFILE "uImage" /* Boot file name */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
153#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
154#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
155#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
156#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
157#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200158#define CONFIG_VERSION_VARIABLE
159#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_HUSH_PARSER
Sergey Kubushync74b2102007-08-10 20:26:18 +0200161#define CONFIG_CMDLINE_EDITING
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_LONGHELP
Sergey Kubushync74b2102007-08-10 20:26:18 +0200163#define CONFIG_CRC32_VERIFY
164#define CONFIG_MX_CYCLIC
165/*===================*/
166/* Linux Information */
167/*===================*/
168#define LINUX_BOOT_PARAM_ADDR 0x80000100
169#define CONFIG_CMDLINE_TAG
170#define CONFIG_SETUP_MEMORY_TAGS
171#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
172#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000"
173/*=================*/
174/* U-Boot commands */
175/*=================*/
176#include <config_cmd_default.h>
177#define CONFIG_CMD_ASKENV
178#define CONFIG_CMD_DHCP
179#define CONFIG_CMD_DIAG
180#define CONFIG_CMD_I2C
181#define CONFIG_CMD_MII
182#define CONFIG_CMD_PING
183#define CONFIG_CMD_SAVES
184#define CONFIG_CMD_EEPROM
185#undef CONFIG_CMD_BDI
186#undef CONFIG_CMD_FPGA
187#undef CONFIG_CMD_SETGETDCR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#ifdef CONFIG_SYS_USE_NAND
Sergey Kubushync74b2102007-08-10 20:26:18 +0200189#undef CONFIG_CMD_FLASH
190#undef CONFIG_CMD_IMLS
191#define CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200193#define CONFIG_CMD_JFFS2
194#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
Sergey Kubushync74b2102007-08-10 20:26:18 +0200196#endif
Sandeep Paulrajf74e1422010-12-11 20:37:54 -0500197
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000198#ifdef CONFIG_CMD_BDI
199#define CONFIG_CLOCKS
200#endif
201
Sandeep Paulrajf74e1422010-12-11 20:37:54 -0500202#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
203
204#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
205#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
206#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
207 CONFIG_SYS_INIT_RAM_SIZE - \
208 GENERATED_GBL_DATA_SIZE)
209
Sergey Kubushync74b2102007-08-10 20:26:18 +0200210#endif /* __CONFIG_H */