Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2013 Atmel Corporation. |
| 4 | * Josh Wu <josh.wu@atmel.com> |
| 5 | * |
| 6 | * Configuation settings for the AT91SAM9N12-EK boards. |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __AT91SAM9N12_CONFIG_H_ |
| 10 | #define __AT91SAM9N12_CONFIG_H_ |
| 11 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 12 | /* ARM asynchronous clock */ |
| 13 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 14 | #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 15 | |
| 16 | /* Misc CPU related */ |
| 17 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 18 | #define CONFIG_SETUP_MEMORY_TAGS |
| 19 | #define CONFIG_INITRD_TAG |
| 20 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 21 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 22 | /* LCD */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 23 | #define LCD_BPP LCD_COLOR16 |
| 24 | #define LCD_OUTPUT_BPP 24 |
| 25 | #define CONFIG_LCD_LOGO |
| 26 | #define CONFIG_LCD_INFO |
| 27 | #define CONFIG_LCD_INFO_BELOW_LOGO |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 28 | #define CONFIG_ATMEL_HLCD |
| 29 | #define CONFIG_ATMEL_LCD_RGB565 |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 30 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 31 | /* |
| 32 | * BOOTP options |
| 33 | */ |
| 34 | #define CONFIG_BOOTP_BOOTFILESIZE |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 35 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 36 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 37 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
| 38 | |
| 39 | /* |
| 40 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
| 41 | * leaving the correct space for initial global data structure above |
| 42 | * that address while providing maximum stack area below. |
| 43 | */ |
| 44 | # define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou Yang | e61ed48 | 2017-09-14 11:07:42 +0800 | [diff] [blame] | 45 | (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 46 | |
| 47 | /* DataFlash */ |
| 48 | #ifdef CONFIG_CMD_SF |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 49 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 50 | #endif |
| 51 | |
| 52 | /* NAND flash */ |
| 53 | #ifdef CONFIG_CMD_NAND |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 54 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 55 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 56 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 57 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
Andreas Bießmann | ac45bb1 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 58 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) |
| 59 | #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 60 | #endif |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 61 | |
| 62 | /* PMECC & PMERRLOC */ |
| 63 | #define CONFIG_ATMEL_NAND_HWECC |
| 64 | #define CONFIG_ATMEL_NAND_HW_PMECC |
| 65 | #define CONFIG_PMECC_CAP 2 |
| 66 | #define CONFIG_PMECC_SECTOR_SIZE 512 |
Bo Shen | ce76f0a | 2013-06-26 10:48:53 +0800 | [diff] [blame] | 67 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 68 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 69 | "console=console=ttyS0,115200\0" \ |
Tom Rini | 43ede0b | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 70 | "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 71 | "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ |
| 72 | "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" |
| 73 | |
Bo Shen | 1627622 | 2013-04-24 10:46:18 +0800 | [diff] [blame] | 74 | /* Ethernet */ |
| 75 | #define CONFIG_KS8851_MLL |
| 76 | #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ |
| 77 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 78 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 79 | |
| 80 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 81 | #define CONFIG_SYS_MEMTEST_END 0x26e00000 |
| 82 | |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 83 | /* USB host */ |
| 84 | #ifdef CONFIG_CMD_USB |
| 85 | #define CONFIG_USB_ATMEL |
Bo Shen | dcd2f1a | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 86 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 87 | #define CONFIG_USB_OHCI_NEW |
| 88 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 89 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI |
| 90 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" |
| 91 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 92 | #endif |
| 93 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 94 | #ifdef CONFIG_SPI_BOOT |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 95 | |
| 96 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 97 | #define CONFIG_ENV_OFFSET 0x5000 |
| 98 | #define CONFIG_ENV_SIZE 0x3000 |
| 99 | #define CONFIG_ENV_SECT_SIZE 0x1000 |
| 100 | #define CONFIG_BOOTCOMMAND \ |
| 101 | "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ |
| 102 | "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ |
| 103 | "bootm 0x22000000" |
| 104 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 105 | #elif defined(CONFIG_NAND_BOOT) |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 106 | |
| 107 | /* bootstrap + u-boot + env + linux in nandflash */ |
Nicolas Ferre | 7b8b19f | 2018-05-09 10:30:25 +0300 | [diff] [blame] | 108 | #define CONFIG_ENV_OFFSET 0x140000 |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 109 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 |
| 110 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
| 111 | #define CONFIG_BOOTCOMMAND \ |
| 112 | "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ |
| 113 | "nand read 0x21000000 0x180000 0x080000;" \ |
| 114 | "nand read 0x22000000 0x200000 0x400000;" \ |
| 115 | "bootm 0x22000000 - 0x21000000" |
| 116 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 117 | #else /* CONFIG_SD_BOOT */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 118 | |
| 119 | /* bootstrap + u-boot + env + linux in mmc */ |
Wu, Josh | 23ac62d | 2015-03-24 17:07:22 +0800 | [diff] [blame] | 120 | |
| 121 | #ifdef CONFIG_ENV_IS_IN_MMC |
| 122 | /* Use raw reserved sectors to save environment */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 123 | #define CONFIG_ENV_OFFSET 0x2000 |
| 124 | #define CONFIG_ENV_SIZE 0x1000 |
| 125 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Wu, Josh | 23ac62d | 2015-03-24 17:07:22 +0800 | [diff] [blame] | 126 | #else |
| 127 | /* Use file in FAT file to save environment */ |
Wu, Josh | 23ac62d | 2015-03-24 17:07:22 +0800 | [diff] [blame] | 128 | #define CONFIG_ENV_SIZE 0x4000 |
| 129 | #endif |
| 130 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 131 | #define CONFIG_BOOTCOMMAND \ |
| 132 | "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ |
| 133 | "fatload mmc 0:1 0x21000000 dtb;" \ |
| 134 | "fatload mmc 0:1 0x22000000 uImage;" \ |
| 135 | "bootm 0x22000000 - 0x21000000" |
| 136 | |
| 137 | #endif |
| 138 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 139 | /* |
| 140 | * Size of malloc() pool |
| 141 | */ |
| 142 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 143 | |
| 144 | /* SPL */ |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 145 | #define CONFIG_SPL_TEXT_BASE 0x300000 |
| 146 | #define CONFIG_SPL_MAX_SIZE 0x6000 |
| 147 | #define CONFIG_SPL_STACK 0x308000 |
| 148 | |
| 149 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 150 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 151 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 152 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 153 | |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 154 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 155 | |
| 156 | #define CONFIG_SYS_MASTER_CLOCK 132096000 |
| 157 | #define CONFIG_SYS_AT91_PLLA 0x20953f03 |
| 158 | #define CONFIG_SYS_MCKR 0x1301 |
| 159 | #define CONFIG_SYS_MCKR_CSS 0x1302 |
| 160 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 161 | #ifdef CONFIG_SD_BOOT |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 162 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| 163 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 164 | |
| 165 | #elif CONFIG_SYS_USE_NANDFLASH |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 166 | #elif CONFIG_SPI_BOOT |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 167 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 |
| 168 | |
| 169 | #elif CONFIG_NAND_BOOT |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 170 | #define CONFIG_SPL_NAND_DRIVERS |
| 171 | #define CONFIG_SPL_NAND_BASE |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 172 | #endif |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 173 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 |
| 174 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 175 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 |
| 176 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 177 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 178 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 |
| 179 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 |
| 180 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER |
| 181 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 182 | #endif |