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wdenk324f6cf2002-10-07 21:13:39 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
wdenk228f29a2002-12-08 09:53:23 +000022 *
23 * Be sure to mark tests to be run before relocation as such with the
24 * CFG_POST_PREREL flag so that logging is done correctly if the
25 * logbuffer support is enabled.
wdenk324f6cf2002-10-07 21:13:39 +000026 */
27
28#include <common.h>
29
30#ifdef CONFIG_POST
31
32#include <post.h>
33
34extern int cache_post_test (int flags);
35extern int watchdog_post_test (int flags);
36extern int i2c_post_test (int flags);
37extern int rtc_post_test (int flags);
38extern int memory_post_test (int flags);
39extern int cpu_post_test (int flags);
Igor Lisitsina11e0692007-03-28 19:06:19 +040040extern int fpu_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000041extern int uart_post_test (int flags);
42extern int ether_post_test (int flags);
43extern int spi_post_test (int flags);
44extern int usb_post_test (int flags);
45extern int spr_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000046extern int sysmon_post_test (int flags);
wdenk5a8c51c2004-04-15 21:16:42 +000047extern int dsp_post_test (int flags);
wdenk79fa88f2004-06-07 23:46:25 +000048extern int codec_post_test (int flags);
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +020049extern int ecc_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000050
51extern int sysmon_init_f (void);
52
53extern void sysmon_reloc (void);
54
wdenk324f6cf2002-10-07 21:13:39 +000055
56struct post_test post_list[] =
57{
58#if CONFIG_POST & CFG_POST_CACHE
59 {
wdenk8bde7f72003-06-27 21:31:46 +000060 "Cache test",
61 "cache",
62 "This test verifies the CPU cache operation.",
63 POST_RAM | POST_ALWAYS,
64 &cache_post_test,
65 NULL,
66 NULL,
wdenk228f29a2002-12-08 09:53:23 +000067 CFG_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000068 },
69#endif
70#if CONFIG_POST & CFG_POST_WATCHDOG
71 {
wdenk8bde7f72003-06-27 21:31:46 +000072 "Watchdog timer test",
73 "watchdog",
74 "This test checks the watchdog timer.",
wdenk8564acf2003-07-14 22:13:32 +000075 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
wdenk8bde7f72003-06-27 21:31:46 +000076 &watchdog_post_test,
77 NULL,
78 NULL,
wdenk228f29a2002-12-08 09:53:23 +000079 CFG_POST_WATCHDOG
wdenk324f6cf2002-10-07 21:13:39 +000080 },
81#endif
82#if CONFIG_POST & CFG_POST_I2C
83 {
wdenk8bde7f72003-06-27 21:31:46 +000084 "I2C test",
85 "i2c",
86 "This test verifies the I2C operation.",
87 POST_RAM | POST_ALWAYS,
88 &i2c_post_test,
89 NULL,
90 NULL,
wdenk228f29a2002-12-08 09:53:23 +000091 CFG_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +000092 },
93#endif
94#if CONFIG_POST & CFG_POST_RTC
95 {
wdenk8bde7f72003-06-27 21:31:46 +000096 "RTC test",
97 "rtc",
98 "This test verifies the RTC operation.",
wdenk8564acf2003-07-14 22:13:32 +000099 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000100 &rtc_post_test,
101 NULL,
102 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000103 CFG_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000104 },
105#endif
106#if CONFIG_POST & CFG_POST_MEMORY
107 {
wdenk8bde7f72003-06-27 21:31:46 +0000108 "Memory test",
109 "memory",
110 "This test checks RAM.",
wdenk8564acf2003-07-14 22:13:32 +0000111 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
wdenk8bde7f72003-06-27 21:31:46 +0000112 &memory_post_test,
113 NULL,
114 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000115 CFG_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000116 },
117#endif
118#if CONFIG_POST & CFG_POST_CPU
119 {
wdenk8bde7f72003-06-27 21:31:46 +0000120 "CPU test",
121 "cpu",
122 "This test verifies the arithmetic logic unit of"
123 " CPU.",
124 POST_RAM | POST_ALWAYS,
125 &cpu_post_test,
126 NULL,
127 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000128 CFG_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000129 },
130#endif
Igor Lisitsina11e0692007-03-28 19:06:19 +0400131#if CONFIG_POST & CFG_POST_FPU
132 {
133 "FPU test",
134 "fpu",
135 "This test verifies the arithmetic logic unit of"
136 " FPU.",
137 POST_RAM | POST_ALWAYS,
138 &fpu_post_test,
139 NULL,
140 NULL,
141 CFG_POST_FPU
142 },
143#endif
wdenk324f6cf2002-10-07 21:13:39 +0000144#if CONFIG_POST & CFG_POST_UART
145 {
wdenk8bde7f72003-06-27 21:31:46 +0000146 "UART test",
147 "uart",
148 "This test verifies the UART operation.",
wdenk8564acf2003-07-14 22:13:32 +0000149 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000150 &uart_post_test,
151 NULL,
152 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000153 CFG_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000154 },
155#endif
156#if CONFIG_POST & CFG_POST_ETHER
157 {
wdenk8bde7f72003-06-27 21:31:46 +0000158 "ETHERNET test",
159 "ethernet",
160 "This test verifies the ETHERNET operation.",
161 POST_RAM | POST_ALWAYS | POST_MANUAL,
162 &ether_post_test,
163 NULL,
164 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000165 CFG_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000166 },
167#endif
168#if CONFIG_POST & CFG_POST_SPI
169 {
wdenk8bde7f72003-06-27 21:31:46 +0000170 "SPI test",
171 "spi",
172 "This test verifies the SPI operation.",
173 POST_RAM | POST_ALWAYS | POST_MANUAL,
174 &spi_post_test,
175 NULL,
176 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000177 CFG_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000178 },
179#endif
180#if CONFIG_POST & CFG_POST_USB
181 {
wdenk8bde7f72003-06-27 21:31:46 +0000182 "USB test",
183 "usb",
184 "This test verifies the USB operation.",
185 POST_RAM | POST_ALWAYS | POST_MANUAL,
186 &usb_post_test,
187 NULL,
188 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000189 CFG_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000190 },
191#endif
192#if CONFIG_POST & CFG_POST_SPR
193 {
wdenk8bde7f72003-06-27 21:31:46 +0000194 "SPR test",
195 "spr",
196 "This test checks SPR contents.",
Stefan Roeseb2e21422008-01-09 10:38:58 +0100197 POST_RAM | POST_ALWAYS,
wdenk8bde7f72003-06-27 21:31:46 +0000198 &spr_post_test,
199 NULL,
200 NULL,
wdenk228f29a2002-12-08 09:53:23 +0000201 CFG_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000202 },
203#endif
wdenk4532cb62003-04-27 22:52:51 +0000204#if CONFIG_POST & CFG_POST_SYSMON
205 {
wdenk8bde7f72003-06-27 21:31:46 +0000206 "SYSMON test",
207 "sysmon",
208 "This test monitors system hardware.",
209 POST_RAM | POST_ALWAYS,
210 &sysmon_post_test,
211 &sysmon_init_f,
212 &sysmon_reloc,
wdenk4532cb62003-04-27 22:52:51 +0000213 CFG_POST_SYSMON
214 },
215#endif
wdenk5a8c51c2004-04-15 21:16:42 +0000216#if CONFIG_POST & CFG_POST_DSP
217 {
218 "DSP test",
219 "dsp",
220 "This test checks any connected DSP(s).",
221 POST_RAM | POST_MANUAL,
222 &dsp_post_test,
223 NULL,
224 NULL,
225 CFG_POST_DSP
226 },
227#endif
wdenk79fa88f2004-06-07 23:46:25 +0000228#if CONFIG_POST & CFG_POST_DSP
229 {
230 "CODEC test",
231 "codec",
232 "This test checks any connected codec(s).",
233 POST_RAM | POST_MANUAL,
234 &codec_post_test,
235 NULL,
236 NULL,
237 CFG_POST_CODEC
238 },
239#endif
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200240#if CONFIG_POST & CFG_POST_ECC
241 {
242 "ECC test",
243 "ecc",
244 "This test checks ECC facility of memory.",
245 POST_ROM | POST_ALWAYS,
246 &ecc_post_test,
247 NULL,
248 NULL,
249 CFG_POST_ECC
250 },
251#endif
wdenk324f6cf2002-10-07 21:13:39 +0000252};
253
254unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
255
256#endif /* CONFIG_POST */