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Boris Brezillond13f5b22018-08-16 17:30:11 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Exceet Electronics GmbH
4 * Copyright (C) 2018 Bootlin
5 *
6 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
7 */
8
9#ifndef __UBOOT__
10#include <linux/dmaengine.h>
11#include <linux/pm_runtime.h>
12#include "internals.h"
13#else
14#include <spi.h>
15#include <spi-mem.h>
16#endif
17
18#ifndef __UBOOT__
19/**
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
21 * memory operation
22 * @ctlr: the SPI controller requesting this dma_map()
23 * @op: the memory operation containing the buffer to map
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
25 * function
26 *
27 * Some controllers might want to do DMA on the data buffer embedded in @op.
28 * This helper prepares everything for you and provides a ready-to-use
29 * sg_table. This function is not intended to be called from spi drivers.
30 * Only SPI controller drivers should use it.
31 * Note that the caller must ensure the memory region pointed by
32 * op->data.buf.{in,out} is DMA-able before calling this function.
33 *
34 * Return: 0 in case of success, a negative error code otherwise.
35 */
36int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
37 const struct spi_mem_op *op,
38 struct sg_table *sgt)
39{
40 struct device *dmadev;
41
42 if (!op->data.nbytes)
43 return -EINVAL;
44
45 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
46 dmadev = ctlr->dma_tx->device->dev;
47 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
48 dmadev = ctlr->dma_rx->device->dev;
49 else
50 dmadev = ctlr->dev.parent;
51
52 if (!dmadev)
53 return -EINVAL;
54
55 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
56 op->data.dir == SPI_MEM_DATA_IN ?
57 DMA_FROM_DEVICE : DMA_TO_DEVICE);
58}
59EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
60
61/**
62 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
63 * memory operation
64 * @ctlr: the SPI controller requesting this dma_unmap()
65 * @op: the memory operation containing the buffer to unmap
66 * @sgt: a pointer to an sg_table previously initialized by
67 * spi_controller_dma_map_mem_op_data()
68 *
69 * Some controllers might want to do DMA on the data buffer embedded in @op.
70 * This helper prepares things so that the CPU can access the
71 * op->data.buf.{in,out} buffer again.
72 *
73 * This function is not intended to be called from SPI drivers. Only SPI
74 * controller drivers should use it.
75 *
76 * This function should be called after the DMA operation has finished and is
77 * only valid if the previous spi_controller_dma_map_mem_op_data() call
78 * returned 0.
79 *
80 * Return: 0 in case of success, a negative error code otherwise.
81 */
82void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
83 const struct spi_mem_op *op,
84 struct sg_table *sgt)
85{
86 struct device *dmadev;
87
88 if (!op->data.nbytes)
89 return;
90
91 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
92 dmadev = ctlr->dma_tx->device->dev;
93 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
94 dmadev = ctlr->dma_rx->device->dev;
95 else
96 dmadev = ctlr->dev.parent;
97
98 spi_unmap_buf(ctlr, dmadev, sgt,
99 op->data.dir == SPI_MEM_DATA_IN ?
100 DMA_FROM_DEVICE : DMA_TO_DEVICE);
101}
102EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
103#endif /* __UBOOT__ */
104
105static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
106{
107 u32 mode = slave->mode;
108
109 switch (buswidth) {
110 case 1:
111 return 0;
112
113 case 2:
114 if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
115 (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
116 return 0;
117
118 break;
119
120 case 4:
121 if ((tx && (mode & SPI_TX_QUAD)) ||
122 (!tx && (mode & SPI_RX_QUAD)))
123 return 0;
124
125 break;
126
127 default:
128 break;
129 }
130
131 return -ENOTSUPP;
132}
133
134bool spi_mem_default_supports_op(struct spi_slave *slave,
135 const struct spi_mem_op *op)
136{
137 if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
138 return false;
139
140 if (op->addr.nbytes &&
141 spi_check_buswidth_req(slave, op->addr.buswidth, true))
142 return false;
143
144 if (op->dummy.nbytes &&
145 spi_check_buswidth_req(slave, op->dummy.buswidth, true))
146 return false;
147
148 if (op->data.nbytes &&
149 spi_check_buswidth_req(slave, op->data.buswidth,
150 op->data.dir == SPI_MEM_DATA_OUT))
151 return false;
152
153 return true;
154}
155EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
156
157/**
158 * spi_mem_supports_op() - Check if a memory device and the controller it is
159 * connected to support a specific memory operation
160 * @slave: the SPI device
161 * @op: the memory operation to check
162 *
163 * Some controllers are only supporting Single or Dual IOs, others might only
164 * support specific opcodes, or it can even be that the controller and device
165 * both support Quad IOs but the hardware prevents you from using it because
166 * only 2 IO lines are connected.
167 *
168 * This function checks whether a specific operation is supported.
169 *
170 * Return: true if @op is supported, false otherwise.
171 */
172bool spi_mem_supports_op(struct spi_slave *slave,
173 const struct spi_mem_op *op)
174{
175 struct udevice *bus = slave->dev->parent;
176 struct dm_spi_ops *ops = spi_get_ops(bus);
177
178 if (ops->mem_ops && ops->mem_ops->supports_op)
179 return ops->mem_ops->supports_op(slave, op);
180
181 return spi_mem_default_supports_op(slave, op);
182}
183EXPORT_SYMBOL_GPL(spi_mem_supports_op);
184
185/**
186 * spi_mem_exec_op() - Execute a memory operation
187 * @slave: the SPI device
188 * @op: the memory operation to execute
189 *
190 * Executes a memory operation.
191 *
192 * This function first checks that @op is supported and then tries to execute
193 * it.
194 *
195 * Return: 0 in case of success, a negative error code otherwise.
196 */
197int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
198{
199 struct udevice *bus = slave->dev->parent;
200 struct dm_spi_ops *ops = spi_get_ops(bus);
201 unsigned int pos = 0;
202 const u8 *tx_buf = NULL;
203 u8 *rx_buf = NULL;
204 u8 *op_buf;
205 int op_len;
206 u32 flag;
207 int ret;
208 int i;
209
210 if (!spi_mem_supports_op(slave, op))
211 return -ENOTSUPP;
212
Vignesh R76094482019-02-05 11:29:14 +0530213 ret = spi_claim_bus(slave);
214 if (ret < 0)
215 return ret;
216
Boris Brezillond13f5b22018-08-16 17:30:11 +0200217 if (ops->mem_ops) {
218#ifndef __UBOOT__
219 /*
220 * Flush the message queue before executing our SPI memory
221 * operation to prevent preemption of regular SPI transfers.
222 */
223 spi_flush_queue(ctlr);
224
225 if (ctlr->auto_runtime_pm) {
226 ret = pm_runtime_get_sync(ctlr->dev.parent);
227 if (ret < 0) {
228 dev_err(&ctlr->dev,
229 "Failed to power device: %d\n",
230 ret);
231 return ret;
232 }
233 }
234
235 mutex_lock(&ctlr->bus_lock_mutex);
236 mutex_lock(&ctlr->io_mutex);
237#endif
238 ret = ops->mem_ops->exec_op(slave, op);
Vignesh R76094482019-02-05 11:29:14 +0530239
Boris Brezillond13f5b22018-08-16 17:30:11 +0200240#ifndef __UBOOT__
241 mutex_unlock(&ctlr->io_mutex);
242 mutex_unlock(&ctlr->bus_lock_mutex);
243
244 if (ctlr->auto_runtime_pm)
245 pm_runtime_put(ctlr->dev.parent);
246#endif
247
248 /*
249 * Some controllers only optimize specific paths (typically the
250 * read path) and expect the core to use the regular SPI
251 * interface in other cases.
252 */
Vignesh R76094482019-02-05 11:29:14 +0530253 if (!ret || ret != -ENOTSUPP) {
254 spi_release_bus(slave);
Boris Brezillond13f5b22018-08-16 17:30:11 +0200255 return ret;
Vignesh R76094482019-02-05 11:29:14 +0530256 }
Boris Brezillond13f5b22018-08-16 17:30:11 +0200257 }
258
259#ifndef __UBOOT__
260 tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
261 op->dummy.nbytes;
262
263 /*
264 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
265 * we're guaranteed that this buffer is DMA-able, as required by the
266 * SPI layer.
267 */
268 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
269 if (!tmpbuf)
270 return -ENOMEM;
271
272 spi_message_init(&msg);
273
274 tmpbuf[0] = op->cmd.opcode;
275 xfers[xferpos].tx_buf = tmpbuf;
276 xfers[xferpos].len = sizeof(op->cmd.opcode);
277 xfers[xferpos].tx_nbits = op->cmd.buswidth;
278 spi_message_add_tail(&xfers[xferpos], &msg);
279 xferpos++;
280 totalxferlen++;
281
282 if (op->addr.nbytes) {
283 int i;
284
285 for (i = 0; i < op->addr.nbytes; i++)
286 tmpbuf[i + 1] = op->addr.val >>
287 (8 * (op->addr.nbytes - i - 1));
288
289 xfers[xferpos].tx_buf = tmpbuf + 1;
290 xfers[xferpos].len = op->addr.nbytes;
291 xfers[xferpos].tx_nbits = op->addr.buswidth;
292 spi_message_add_tail(&xfers[xferpos], &msg);
293 xferpos++;
294 totalxferlen += op->addr.nbytes;
295 }
296
297 if (op->dummy.nbytes) {
298 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
299 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
300 xfers[xferpos].len = op->dummy.nbytes;
301 xfers[xferpos].tx_nbits = op->dummy.buswidth;
302 spi_message_add_tail(&xfers[xferpos], &msg);
303 xferpos++;
304 totalxferlen += op->dummy.nbytes;
305 }
306
307 if (op->data.nbytes) {
308 if (op->data.dir == SPI_MEM_DATA_IN) {
309 xfers[xferpos].rx_buf = op->data.buf.in;
310 xfers[xferpos].rx_nbits = op->data.buswidth;
311 } else {
312 xfers[xferpos].tx_buf = op->data.buf.out;
313 xfers[xferpos].tx_nbits = op->data.buswidth;
314 }
315
316 xfers[xferpos].len = op->data.nbytes;
317 spi_message_add_tail(&xfers[xferpos], &msg);
318 xferpos++;
319 totalxferlen += op->data.nbytes;
320 }
321
322 ret = spi_sync(slave, &msg);
323
324 kfree(tmpbuf);
325
326 if (ret)
327 return ret;
328
329 if (msg.actual_length != totalxferlen)
330 return -EIO;
331#else
332
Boris Brezillond13f5b22018-08-16 17:30:11 +0200333 if (op->data.nbytes) {
334 if (op->data.dir == SPI_MEM_DATA_IN)
335 rx_buf = op->data.buf.in;
336 else
337 tx_buf = op->data.buf.out;
338 }
339
340 op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
341 op_buf = calloc(1, op_len);
342
Boris Brezillond13f5b22018-08-16 17:30:11 +0200343 op_buf[pos++] = op->cmd.opcode;
344
345 if (op->addr.nbytes) {
346 for (i = 0; i < op->addr.nbytes; i++)
347 op_buf[pos + i] = op->addr.val >>
348 (8 * (op->addr.nbytes - i - 1));
349
350 pos += op->addr.nbytes;
351 }
352
353 if (op->dummy.nbytes)
354 memset(op_buf + pos, 0xff, op->dummy.nbytes);
355
356 /* 1st transfer: opcode + address + dummy cycles */
357 flag = SPI_XFER_BEGIN;
358 /* Make sure to set END bit if no tx or rx data messages follow */
359 if (!tx_buf && !rx_buf)
360 flag |= SPI_XFER_END;
361
362 ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
363 if (ret)
364 return ret;
365
366 /* 2nd transfer: rx or tx data path */
367 if (tx_buf || rx_buf) {
368 ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
369 rx_buf, SPI_XFER_END);
370 if (ret)
371 return ret;
372 }
373
374 spi_release_bus(slave);
375
376 for (i = 0; i < pos; i++)
377 debug("%02x ", op_buf[i]);
378 debug("| [%dB %s] ",
379 tx_buf || rx_buf ? op->data.nbytes : 0,
380 tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
381 for (i = 0; i < op->data.nbytes; i++)
382 debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
383 debug("[ret %d]\n", ret);
384
385 free(op_buf);
386
387 if (ret < 0)
388 return ret;
389#endif /* __UBOOT__ */
390
391 return 0;
392}
393EXPORT_SYMBOL_GPL(spi_mem_exec_op);
394
395/**
396 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
397 * match controller limitations
398 * @slave: the SPI device
399 * @op: the operation to adjust
400 *
401 * Some controllers have FIFO limitations and must split a data transfer
402 * operation into multiple ones, others require a specific alignment for
403 * optimized accesses. This function allows SPI mem drivers to split a single
404 * operation into multiple sub-operations when required.
405 *
406 * Return: a negative error code if the controller can't properly adjust @op,
407 * 0 otherwise. Note that @op->data.nbytes will be updated if @op
408 * can't be handled in a single step.
409 */
410int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
411{
412 struct udevice *bus = slave->dev->parent;
413 struct dm_spi_ops *ops = spi_get_ops(bus);
414
415 if (ops->mem_ops && ops->mem_ops->adjust_op_size)
416 return ops->mem_ops->adjust_op_size(slave, op);
417
Vignesh R12563f72019-02-05 11:29:13 +0530418 if (!ops->mem_ops || !ops->mem_ops->exec_op) {
419 unsigned int len;
420
421 len = sizeof(op->cmd.opcode) + op->addr.nbytes +
422 op->dummy.nbytes;
423 if (slave->max_write_size && len > slave->max_write_size)
424 return -EINVAL;
425
426 if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size)
427 op->data.nbytes = min(op->data.nbytes,
428 slave->max_read_size);
429 else if (slave->max_write_size)
430 op->data.nbytes = min(op->data.nbytes,
431 slave->max_write_size - len);
432
433 if (!op->data.nbytes)
434 return -EINVAL;
435 }
436
Boris Brezillond13f5b22018-08-16 17:30:11 +0200437 return 0;
438}
439EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
440
441#ifndef __UBOOT__
442static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
443{
444 return container_of(drv, struct spi_mem_driver, spidrv.driver);
445}
446
447static int spi_mem_probe(struct spi_device *spi)
448{
449 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
450 struct spi_mem *mem;
451
452 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
453 if (!mem)
454 return -ENOMEM;
455
456 mem->spi = spi;
457 spi_set_drvdata(spi, mem);
458
459 return memdrv->probe(mem);
460}
461
462static int spi_mem_remove(struct spi_device *spi)
463{
464 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
465 struct spi_mem *mem = spi_get_drvdata(spi);
466
467 if (memdrv->remove)
468 return memdrv->remove(mem);
469
470 return 0;
471}
472
473static void spi_mem_shutdown(struct spi_device *spi)
474{
475 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
476 struct spi_mem *mem = spi_get_drvdata(spi);
477
478 if (memdrv->shutdown)
479 memdrv->shutdown(mem);
480}
481
482/**
483 * spi_mem_driver_register_with_owner() - Register a SPI memory driver
484 * @memdrv: the SPI memory driver to register
485 * @owner: the owner of this driver
486 *
487 * Registers a SPI memory driver.
488 *
489 * Return: 0 in case of success, a negative error core otherwise.
490 */
491
492int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
493 struct module *owner)
494{
495 memdrv->spidrv.probe = spi_mem_probe;
496 memdrv->spidrv.remove = spi_mem_remove;
497 memdrv->spidrv.shutdown = spi_mem_shutdown;
498
499 return __spi_register_driver(owner, &memdrv->spidrv);
500}
501EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
502
503/**
504 * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
505 * @memdrv: the SPI memory driver to unregister
506 *
507 * Unregisters a SPI memory driver.
508 */
509void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
510{
511 spi_unregister_driver(&memdrv->spidrv);
512}
513EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
514#endif /* __UBOOT__ */