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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +02002/*
3 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +02005 * Lead Tech Design <www.leadtechdesign.com>
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +02006 */
7
8#include <common.h>
Simon Glass9a3b4ce2019-12-28 10:45:01 -07009#include <cpu_func.h>
Reinhard Meyer86592f62010-11-07 13:26:14 +010010#include <asm/io.h>
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +020011#include <asm/arch/hardware.h>
12#include <asm/arch/at91_rstc.h>
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +020013
Reinhard Meyere0cd44c2010-08-09 13:25:37 +020014/* Reset the cpu by telling the reset controller to do so */
Harald Seiler35b65dd2020-12-15 16:47:52 +010015void reset_cpu(void)
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +020016{
Reinhard Meyer9f3fe902010-11-03 15:39:55 +010017 at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
Jens Scharsig0cf0b932010-02-03 22:46:58 +010018
Reinhard Meyere0cd44c2010-08-09 13:25:37 +020019 writel(AT91_RSTC_KEY
20 | AT91_RSTC_CR_PROCRST /* Processor Reset */
21 | AT91_RSTC_CR_PERRST /* Peripheral Reset */
22#ifdef CONFIG_AT91RESET_EXTRST
23 | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */
24#endif
25 , &rstc->cr);
26 /* never reached */
27 while (1)
28 ;
Jean-Christophe PLAGNIOL-VILLARD5bb59b32009-05-31 12:44:45 +020029}