blob: c543bb5314892df8799afc754f8dfd4a54774107 [file] [log] [blame]
wdenk81a88242002-10-26 15:22:42 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * I2C Functions similar to the standard memory functions.
26 *
27 * There are several parameters in many of the commands that bear further
28 * explanations:
29 *
30 * Two of the commands (imm and imw) take a byte/word/long modifier
31 * (e.g. imm.w specifies the word-length modifier). This was done to
32 * allow manipulating word-length registers. It was not done on any other
33 * commands because it was not deemed useful.
34 *
35 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
36 * Each I2C chip on the bus has a unique address. On the I2C data bus,
37 * the address is the upper seven bits and the LSB is the "read/write"
38 * bit. Note that the {i2c_chip} address specified on the command
39 * line is not shifted up: e.g. a typical EEPROM memory chip may have
40 * an I2C address of 0x50, but the data put on the bus will be 0xA0
41 * for write and 0xA1 for read. This "non shifted" address notation
42 * matches at least half of the data sheets :-/.
43 *
44 * {addr} is the address (or offset) within the chip. Small memory
45 * chips have 8 bit addresses. Large memory chips have 16 bit
46 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
47 * Many non-memory chips have multiple registers and {addr} is used
48 * as the register index. Some non-memory chips have only one register
49 * and therefore don't need any {addr} parameter.
50 *
51 * The default {addr} parameter is one byte (.1) which works well for
52 * memories and registers with 8 bits of address space.
53 *
54 * You can specify the length of the {addr} field with the optional .0,
55 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
56 * manipulating a single register device which doesn't use an address
57 * field, use "0.0" for the address and the ".0" length field will
58 * suppress the address in the I2C data stream. This also works for
59 * successive reads using the I2C auto-incrementing memory pointer.
60 *
61 * If you are manipulating a large memory with 2-byte addresses, use
62 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
63 *
64 * Then there are the unfortunate memory chips that spill the most
65 * significant 1, 2, or 3 bits of address into the chip address byte.
66 * This effectively makes one chip (logically) look like 2, 4, or
67 * 8 chips. This is handled (awkwardly) by #defining
68 * CFG_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
69 * {addr} field (since .1 is the default, it doesn't actually have to
70 * be specified). Examples: given a memory chip at I2C chip address
71 * 0x50, the following would happen...
72 * imd 50 0 10 display 16 bytes starting at 0x000
73 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
74 * imd 50 100 10 display 16 bytes starting at 0x100
75 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
76 * imd 50 210 10 display 16 bytes starting at 0x210
77 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
78 * This is awfully ugly. It would be nice if someone would think up
79 * a better way of handling this.
80 *
81 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
82 */
83
84#include <common.h>
85#include <command.h>
wdenk81a88242002-10-26 15:22:42 +000086#include <i2c.h>
87#include <asm/byteorder.h>
88
89#if (CONFIG_COMMANDS & CFG_CMD_I2C)
90
91
92/* Display values from last command.
93 * Memory modify remembered values are different from display memory.
94 */
95static uchar i2c_dp_last_chip;
96static uint i2c_dp_last_addr;
97static uint i2c_dp_last_alen;
98static uint i2c_dp_last_length = 0x10;
99
100static uchar i2c_mm_last_chip;
101static uint i2c_mm_last_addr;
102static uint i2c_mm_last_alen;
103
104#if defined(CFG_I2C_NOPROBES)
105static uchar i2c_no_probes[] = CFG_I2C_NOPROBES;
106#endif
107
108static int
109mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]);
110extern int cmd_get_data_size(char* arg, int default_size);
111
112/*
113 * Syntax:
114 * imd {i2c_chip} {addr}{.0, .1, .2} {len}
115 */
116#define DISP_LINE_LEN 16
117
118int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
119{
120 u_char chip;
121 uint addr, alen, length;
122 int j, nbytes, linebytes;
123
124 /* We use the last specified parameters, unless new ones are
125 * entered.
126 */
127 chip = i2c_dp_last_chip;
128 addr = i2c_dp_last_addr;
129 alen = i2c_dp_last_alen;
130 length = i2c_dp_last_length;
131
132 if (argc < 3) {
133 printf ("Usage:\n%s\n", cmdtp->usage);
134 return 1;
135 }
136
137 if ((flag & CMD_FLAG_REPEAT) == 0) {
138 /*
139 * New command specified.
140 */
141 alen = 1;
142
143 /*
144 * I2C chip address
145 */
146 chip = simple_strtoul(argv[1], NULL, 16);
147
148 /*
149 * I2C data address within the chip. This can be 1 or
150 * 2 bytes long. Some day it might be 3 bytes long :-).
151 */
152 addr = simple_strtoul(argv[2], NULL, 16);
153 alen = 1;
154 for(j = 0; j < 8; j++) {
155 if (argv[2][j] == '.') {
156 alen = argv[2][j+1] - '0';
157 if (alen > 4) {
158 printf ("Usage:\n%s\n", cmdtp->usage);
159 return 1;
160 }
161 break;
162 } else if (argv[2][j] == '\0') {
163 break;
164 }
165 }
166
167 /*
168 * If another parameter, it is the length to display.
169 * Length is the number of objects, not number of bytes.
170 */
171 if (argc > 3)
172 length = simple_strtoul(argv[3], NULL, 16);
173 }
174
175 /*
176 * Print the lines.
177 *
178 * We buffer all read data, so we can make sure data is read only
179 * once.
180 */
181 nbytes = length;
182 do {
183 unsigned char linebuf[DISP_LINE_LEN];
184 unsigned char *cp;
185
186 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
187
188 if(i2c_read(chip, addr, alen, linebuf, linebytes) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000189 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000190 } else {
191 printf("%04x:", addr);
192 cp = linebuf;
193 for (j=0; j<linebytes; j++) {
194 printf(" %02x", *cp++);
195 addr++;
196 }
wdenk4b9206e2004-03-23 22:14:11 +0000197 puts (" ");
wdenk81a88242002-10-26 15:22:42 +0000198 cp = linebuf;
199 for (j=0; j<linebytes; j++) {
200 if ((*cp < 0x20) || (*cp > 0x7e))
wdenk4b9206e2004-03-23 22:14:11 +0000201 puts (".");
wdenk81a88242002-10-26 15:22:42 +0000202 else
203 printf("%c", *cp);
204 cp++;
205 }
wdenk4b9206e2004-03-23 22:14:11 +0000206 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000207 }
208 nbytes -= linebytes;
209 } while (nbytes > 0);
210
211 i2c_dp_last_chip = chip;
212 i2c_dp_last_addr = addr;
213 i2c_dp_last_alen = alen;
214 i2c_dp_last_length = length;
215
216 return 0;
217}
218
219int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
220{
221 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
222}
223
224
225int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
226{
227 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
228}
229
230/* Write (fill) memory
231 *
232 * Syntax:
233 * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
234 */
235int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
236{
237 uchar chip;
238 ulong addr;
239 uint alen;
240 uchar byte;
241 int count;
242 int j;
243
244 if ((argc < 4) || (argc > 5)) {
245 printf ("Usage:\n%s\n", cmdtp->usage);
246 return 1;
247 }
248
249 /*
250 * Chip is always specified.
251 */
252 chip = simple_strtoul(argv[1], NULL, 16);
253
254 /*
255 * Address is always specified.
256 */
257 addr = simple_strtoul(argv[2], NULL, 16);
258 alen = 1;
259 for(j = 0; j < 8; j++) {
260 if (argv[2][j] == '.') {
261 alen = argv[2][j+1] - '0';
262 if(alen > 4) {
263 printf ("Usage:\n%s\n", cmdtp->usage);
264 return 1;
265 }
266 break;
267 } else if (argv[2][j] == '\0') {
268 break;
269 }
270 }
271
272 /*
273 * Value to write is always specified.
274 */
275 byte = simple_strtoul(argv[3], NULL, 16);
276
277 /*
278 * Optional count
279 */
280 if(argc == 5) {
281 count = simple_strtoul(argv[4], NULL, 16);
282 } else {
283 count = 1;
284 }
285
286 while (count-- > 0) {
287 if(i2c_write(chip, addr++, alen, &byte, 1) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000288 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000289 }
290 /*
291 * Wait for the write to complete. The write can take
292 * up to 10mSec (we allow a little more time).
293 *
294 * On some chips, while the write is in progress, the
295 * chip doesn't respond. This apparently isn't a
296 * universal feature so we don't take advantage of it.
297 */
d4f5c722005-08-12 21:16:13 +0200298/*
299 * No write delay with FRAM devices.
300 */
301#if !defined(CFG_I2C_FRAM)
wdenk81a88242002-10-26 15:22:42 +0000302 udelay(11000);
d4f5c722005-08-12 21:16:13 +0200303#endif
304
wdenk81a88242002-10-26 15:22:42 +0000305#if 0
306 for(timeout = 0; timeout < 10; timeout++) {
307 udelay(2000);
308 if(i2c_probe(chip) == 0)
309 break;
310 }
311#endif
312 }
313
314 return (0);
315}
316
317
318/* Calculate a CRC on memory
319 *
320 * Syntax:
321 * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
322 */
323int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
324{
325 uchar chip;
326 ulong addr;
327 uint alen;
328 int count;
329 uchar byte;
330 ulong crc;
331 ulong err;
332 int j;
333
334 if (argc < 4) {
335 printf ("Usage:\n%s\n", cmdtp->usage);
336 return 1;
337 }
338
339 /*
340 * Chip is always specified.
341 */
342 chip = simple_strtoul(argv[1], NULL, 16);
343
344 /*
345 * Address is always specified.
346 */
347 addr = simple_strtoul(argv[2], NULL, 16);
348 alen = 1;
349 for(j = 0; j < 8; j++) {
350 if (argv[2][j] == '.') {
351 alen = argv[2][j+1] - '0';
352 if(alen > 4) {
353 printf ("Usage:\n%s\n", cmdtp->usage);
354 return 1;
355 }
356 break;
357 } else if (argv[2][j] == '\0') {
358 break;
359 }
360 }
361
362 /*
363 * Count is always specified
364 */
365 count = simple_strtoul(argv[3], NULL, 16);
366
367 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
368 /*
369 * CRC a byte at a time. This is going to be slooow, but hey, the
370 * memories are small and slow too so hopefully nobody notices.
371 */
372 crc = 0;
373 err = 0;
374 while(count-- > 0) {
375 if(i2c_read(chip, addr, alen, &byte, 1) != 0) {
376 err++;
377 }
378 crc = crc32 (crc, &byte, 1);
379 addr++;
380 }
381 if(err > 0)
382 {
wdenk4b9206e2004-03-23 22:14:11 +0000383 puts ("Error reading the chip,\n");
wdenk81a88242002-10-26 15:22:42 +0000384 } else {
385 printf ("%08lx\n", crc);
386 }
387
388 return 0;
389}
390
391
392/* Modify memory.
393 *
394 * Syntax:
395 * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
396 * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
397 */
398
399static int
400mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
401{
402 uchar chip;
403 ulong addr;
404 uint alen;
405 ulong data;
406 int size = 1;
407 int nbytes;
408 int j;
409 extern char console_buffer[];
410
411 if (argc != 3) {
412 printf ("Usage:\n%s\n", cmdtp->usage);
413 return 1;
414 }
415
416#ifdef CONFIG_BOOT_RETRY_TIME
417 reset_cmd_timeout(); /* got a good command to get here */
418#endif
419 /*
420 * We use the last specified parameters, unless new ones are
421 * entered.
422 */
423 chip = i2c_mm_last_chip;
424 addr = i2c_mm_last_addr;
425 alen = i2c_mm_last_alen;
426
427 if ((flag & CMD_FLAG_REPEAT) == 0) {
428 /*
429 * New command specified. Check for a size specification.
430 * Defaults to byte if no or incorrect specification.
431 */
432 size = cmd_get_data_size(argv[0], 1);
433
434 /*
435 * Chip is always specified.
436 */
437 chip = simple_strtoul(argv[1], NULL, 16);
438
439 /*
440 * Address is always specified.
441 */
442 addr = simple_strtoul(argv[2], NULL, 16);
443 alen = 1;
444 for(j = 0; j < 8; j++) {
445 if (argv[2][j] == '.') {
446 alen = argv[2][j+1] - '0';
447 if(alen > 4) {
448 printf ("Usage:\n%s\n", cmdtp->usage);
449 return 1;
450 }
451 break;
452 } else if (argv[2][j] == '\0') {
453 break;
454 }
455 }
456 }
457
458 /*
459 * Print the address, followed by value. Then accept input for
460 * the next value. A non-converted value exits.
461 */
462 do {
463 printf("%08lx:", addr);
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200464 if(i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000465 puts ("\nError reading the chip,\n");
wdenk81a88242002-10-26 15:22:42 +0000466 } else {
467 data = cpu_to_be32(data);
468 if(size == 1) {
469 printf(" %02lx", (data >> 24) & 0x000000FF);
470 } else if(size == 2) {
471 printf(" %04lx", (data >> 16) & 0x0000FFFF);
472 } else {
473 printf(" %08lx", data);
474 }
475 }
476
477 nbytes = readline (" ? ");
478 if (nbytes == 0) {
479 /*
480 * <CR> pressed as only input, don't modify current
481 * location and move to next.
482 */
483 if (incrflag)
484 addr += size;
485 nbytes = size;
486#ifdef CONFIG_BOOT_RETRY_TIME
487 reset_cmd_timeout(); /* good enough to not time out */
488#endif
489 }
490#ifdef CONFIG_BOOT_RETRY_TIME
491 else if (nbytes == -2) {
492 break; /* timed out, exit the command */
493 }
494#endif
495 else {
496 char *endp;
497
498 data = simple_strtoul(console_buffer, &endp, 16);
499 if(size == 1) {
500 data = data << 24;
501 } else if(size == 2) {
502 data = data << 16;
503 }
504 data = be32_to_cpu(data);
505 nbytes = endp - console_buffer;
506 if (nbytes) {
507#ifdef CONFIG_BOOT_RETRY_TIME
508 /*
509 * good enough to not time out
510 */
511 reset_cmd_timeout();
512#endif
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200513 if(i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000514 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000515 }
wdenk2535d602003-07-17 23:16:40 +0000516#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
517 udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
518#endif
wdenk81a88242002-10-26 15:22:42 +0000519 if (incrflag)
520 addr += size;
521 }
522 }
523 } while (nbytes);
524
525 chip = i2c_mm_last_chip;
526 addr = i2c_mm_last_addr;
527 alen = i2c_mm_last_alen;
528
529 return 0;
530}
531
532/*
533 * Syntax:
534 * iprobe {addr}{.0, .1, .2}
535 */
536int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
537{
538 int j;
539#if defined(CFG_I2C_NOPROBES)
540 int k, skip;
541#endif
542
wdenk4b9206e2004-03-23 22:14:11 +0000543 puts ("Valid chip addresses:");
wdenk81a88242002-10-26 15:22:42 +0000544 for(j = 0; j < 128; j++) {
545#if defined(CFG_I2C_NOPROBES)
546 skip = 0;
547 for (k = 0; k < sizeof(i2c_no_probes); k++){
548 if (j == i2c_no_probes[k]){
549 skip = 1;
550 break;
551 }
552 }
553 if (skip)
554 continue;
555#endif
556 if(i2c_probe(j) == 0) {
557 printf(" %02X", j);
558 }
559 }
wdenk4b9206e2004-03-23 22:14:11 +0000560 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000561
562#if defined(CFG_I2C_NOPROBES)
563 puts ("Excluded chip addresses:");
564 for( k = 0; k < sizeof(i2c_no_probes); k++ )
565 printf(" %02X", i2c_no_probes[k] );
wdenk4b9206e2004-03-23 22:14:11 +0000566 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000567#endif
568
569 return 0;
570}
571
572
573/*
574 * Syntax:
575 * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
576 * {length} - Number of bytes to read
577 * {delay} - A DECIMAL number and defaults to 1000 uSec
578 */
579int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
580{
581 u_char chip;
582 ulong alen;
583 uint addr;
584 uint length;
585 u_char bytes[16];
586 int delay;
587 int j;
588
589 if (argc < 3) {
590 printf ("Usage:\n%s\n", cmdtp->usage);
591 return 1;
592 }
593
594 /*
595 * Chip is always specified.
596 */
597 chip = simple_strtoul(argv[1], NULL, 16);
598
599 /*
600 * Address is always specified.
601 */
602 addr = simple_strtoul(argv[2], NULL, 16);
603 alen = 1;
604 for(j = 0; j < 8; j++) {
605 if (argv[2][j] == '.') {
606 alen = argv[2][j+1] - '0';
607 if (alen > 4) {
608 printf ("Usage:\n%s\n", cmdtp->usage);
609 return 1;
610 }
611 break;
612 } else if (argv[2][j] == '\0') {
613 break;
614 }
615 }
616
617 /*
618 * Length is the number of objects, not number of bytes.
619 */
620 length = 1;
621 length = simple_strtoul(argv[3], NULL, 16);
622 if(length > sizeof(bytes)) {
623 length = sizeof(bytes);
624 }
625
626 /*
627 * The delay time (uSec) is optional.
628 */
629 delay = 1000;
630 if (argc > 3) {
631 delay = simple_strtoul(argv[4], NULL, 10);
632 }
633 /*
634 * Run the loop...
635 */
636 while(1) {
637 if(i2c_read(chip, addr, alen, bytes, length) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000638 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000639 }
640 udelay(delay);
641 }
642
643 /* NOTREACHED */
644 return 0;
645}
646
647
648/*
649 * The SDRAM command is separately configured because many
650 * (most?) embedded boards don't use SDRAM DIMMs.
651 */
652#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
653
654/*
655 * Syntax:
656 * sdram {i2c_chip}
657 */
658int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
659{
660 u_char chip;
661 u_char data[128];
662 u_char cksum;
663 int j;
664
665 if (argc < 2) {
666 printf ("Usage:\n%s\n", cmdtp->usage);
667 return 1;
668 }
669 /*
670 * Chip is always specified.
671 */
672 chip = simple_strtoul(argv[1], NULL, 16);
673
674 if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000675 puts ("No SDRAM Serial Presence Detect found.\n");
wdenk81a88242002-10-26 15:22:42 +0000676 return 1;
677 }
678
679 cksum = 0;
680 for (j = 0; j < 63; j++) {
681 cksum += data[j];
682 }
683 if(cksum != data[63]) {
684 printf ("WARNING: Configuration data checksum failure:\n"
685 " is 0x%02x, calculated 0x%02x\n",
686 data[63], cksum);
687 }
688 printf("SPD data revision %d.%d\n",
689 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
690 printf("Bytes used 0x%02X\n", data[0]);
691 printf("Serial memory size 0x%02X\n", 1 << data[1]);
wdenk4b9206e2004-03-23 22:14:11 +0000692 puts ("Memory type ");
wdenk81a88242002-10-26 15:22:42 +0000693 switch(data[2]) {
wdenk4b9206e2004-03-23 22:14:11 +0000694 case 2: puts ("EDO\n"); break;
695 case 4: puts ("SDRAM\n"); break;
696 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000697 }
wdenk4b9206e2004-03-23 22:14:11 +0000698 puts ("Row address bits ");
wdenk81a88242002-10-26 15:22:42 +0000699 if((data[3] & 0x00F0) == 0) {
700 printf("%d\n", data[3] & 0x0F);
701 } else {
702 printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
703 }
wdenk4b9206e2004-03-23 22:14:11 +0000704 puts ("Column address bits ");
wdenk81a88242002-10-26 15:22:42 +0000705 if((data[4] & 0x00F0) == 0) {
706 printf("%d\n", data[4] & 0x0F);
707 } else {
708 printf("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
709 }
710 printf("Module rows %d\n", data[5]);
711 printf("Module data width %d bits\n", (data[7] << 8) | data[6]);
wdenk4b9206e2004-03-23 22:14:11 +0000712 puts ("Interface signal levels ");
wdenk81a88242002-10-26 15:22:42 +0000713 switch(data[8]) {
wdenk4b9206e2004-03-23 22:14:11 +0000714 case 0: puts ("5.0v/TTL\n"); break;
715 case 1: puts ("LVTTL\n"); break;
716 case 2: puts ("HSTL 1.5\n"); break;
717 case 3: puts ("SSTL 3.3\n"); break;
718 case 4: puts ("SSTL 2.5\n"); break;
719 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000720 }
721 printf("SDRAM cycle time %d.%d nS\n",
722 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
723 printf("SDRAM access time %d.%d nS\n",
724 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
wdenk4b9206e2004-03-23 22:14:11 +0000725 puts ("EDC configuration ");
wdenk81a88242002-10-26 15:22:42 +0000726 switch(data[11]) {
wdenk4b9206e2004-03-23 22:14:11 +0000727 case 0: puts ("None\n"); break;
728 case 1: puts ("Parity\n"); break;
729 case 2: puts ("ECC\n"); break;
730 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000731 }
732 if((data[12] & 0x80) == 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000733 puts ("No self refresh, rate ");
wdenk81a88242002-10-26 15:22:42 +0000734 } else {
wdenk4b9206e2004-03-23 22:14:11 +0000735 puts ("Self refresh, rate ");
wdenk81a88242002-10-26 15:22:42 +0000736 }
737 switch(data[12] & 0x7F) {
wdenk4b9206e2004-03-23 22:14:11 +0000738 case 0: puts ("15.625uS\n"); break;
739 case 1: puts ("3.9uS\n"); break;
740 case 2: puts ("7.8uS\n"); break;
741 case 3: puts ("31.3uS\n"); break;
742 case 4: puts ("62.5uS\n"); break;
743 case 5: puts ("125uS\n"); break;
744 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000745 }
746 printf("SDRAM width (primary) %d\n", data[13] & 0x7F);
747 if((data[13] & 0x80) != 0) {
748 printf(" (second bank) %d\n",
749 2 * (data[13] & 0x7F));
750 }
751 if(data[14] != 0) {
752 printf("EDC width %d\n",
753 data[14] & 0x7F);
754 if((data[14] & 0x80) != 0) {
755 printf(" (second bank) %d\n",
756 2 * (data[14] & 0x7F));
757 }
758 }
759 printf("Min clock delay, back-to-back random column addresses %d\n",
760 data[15]);
wdenk4b9206e2004-03-23 22:14:11 +0000761 puts ("Burst length(s) ");
762 if (data[16] & 0x80) puts (" Page");
763 if (data[16] & 0x08) puts (" 8");
764 if (data[16] & 0x04) puts (" 4");
765 if (data[16] & 0x02) puts (" 2");
766 if (data[16] & 0x01) puts (" 1");
767 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000768 printf("Number of banks %d\n", data[17]);
wdenk4b9206e2004-03-23 22:14:11 +0000769 puts ("CAS latency(s) ");
770 if (data[18] & 0x80) puts (" TBD");
771 if (data[18] & 0x40) puts (" 7");
772 if (data[18] & 0x20) puts (" 6");
773 if (data[18] & 0x10) puts (" 5");
774 if (data[18] & 0x08) puts (" 4");
775 if (data[18] & 0x04) puts (" 3");
776 if (data[18] & 0x02) puts (" 2");
777 if (data[18] & 0x01) puts (" 1");
778 putc ('\n');
779 puts ("CS latency(s) ");
780 if (data[19] & 0x80) puts (" TBD");
781 if (data[19] & 0x40) puts (" 6");
782 if (data[19] & 0x20) puts (" 5");
783 if (data[19] & 0x10) puts (" 4");
784 if (data[19] & 0x08) puts (" 3");
785 if (data[19] & 0x04) puts (" 2");
786 if (data[19] & 0x02) puts (" 1");
787 if (data[19] & 0x01) puts (" 0");
788 putc ('\n');
789 puts ("WE latency(s) ");
790 if (data[20] & 0x80) puts (" TBD");
791 if (data[20] & 0x40) puts (" 6");
792 if (data[20] & 0x20) puts (" 5");
793 if (data[20] & 0x10) puts (" 4");
794 if (data[20] & 0x08) puts (" 3");
795 if (data[20] & 0x04) puts (" 2");
796 if (data[20] & 0x02) puts (" 1");
797 if (data[20] & 0x01) puts (" 0");
798 putc ('\n');
799 puts ("Module attributes:\n");
800 if (!data[21]) puts (" (none)\n");
801 if (data[21] & 0x80) puts (" TBD (bit 7)\n");
802 if (data[21] & 0x40) puts (" Redundant row address\n");
803 if (data[21] & 0x20) puts (" Differential clock input\n");
804 if (data[21] & 0x10) puts (" Registerd DQMB inputs\n");
805 if (data[21] & 0x08) puts (" Buffered DQMB inputs\n");
806 if (data[21] & 0x04) puts (" On-card PLL\n");
807 if (data[21] & 0x02) puts (" Registered address/control lines\n");
808 if (data[21] & 0x01) puts (" Buffered address/control lines\n");
809 puts ("Device attributes:\n");
810 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
811 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
812 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
813 else puts (" Upper Vcc tolerance 10%\n");
814 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
815 else puts (" Lower Vcc tolerance 10%\n");
816 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
817 if (data[22] & 0x04) puts (" Supports precharge all\n");
818 if (data[22] & 0x02) puts (" Supports auto precharge\n");
819 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
wdenk81a88242002-10-26 15:22:42 +0000820 printf("SDRAM cycle time (2nd highest CAS latency) %d.%d nS\n",
821 (data[23] >> 4) & 0x0F, data[23] & 0x0F);
822 printf("SDRAM access from clock (2nd highest CAS latency) %d.%d nS\n",
823 (data[24] >> 4) & 0x0F, data[24] & 0x0F);
824 printf("SDRAM cycle time (3rd highest CAS latency) %d.%d nS\n",
825 (data[25] >> 4) & 0x0F, data[25] & 0x0F);
826 printf("SDRAM access from clock (3rd highest CAS latency) %d.%d nS\n",
827 (data[26] >> 4) & 0x0F, data[26] & 0x0F);
828 printf("Minimum row precharge %d nS\n", data[27]);
829 printf("Row active to row active min %d nS\n", data[28]);
830 printf("RAS to CAS delay min %d nS\n", data[29]);
831 printf("Minimum RAS pulse width %d nS\n", data[30]);
wdenk4b9206e2004-03-23 22:14:11 +0000832 puts ("Density of each row ");
833 if (data[31] & 0x80) puts (" 512");
834 if (data[31] & 0x40) puts (" 256");
835 if (data[31] & 0x20) puts (" 128");
836 if (data[31] & 0x10) puts (" 64");
837 if (data[31] & 0x08) puts (" 32");
838 if (data[31] & 0x04) puts (" 16");
839 if (data[31] & 0x02) puts (" 8");
840 if (data[31] & 0x01) puts (" 4");
841 puts ("MByte\n");
wdenk81a88242002-10-26 15:22:42 +0000842 printf("Command and Address setup %c%d.%d nS\n",
843 (data[32] & 0x80) ? '-' : '+',
844 (data[32] >> 4) & 0x07, data[32] & 0x0F);
845 printf("Command and Address hold %c%d.%d nS\n",
846 (data[33] & 0x80) ? '-' : '+',
847 (data[33] >> 4) & 0x07, data[33] & 0x0F);
848 printf("Data signal input setup %c%d.%d nS\n",
849 (data[34] & 0x80) ? '-' : '+',
850 (data[34] >> 4) & 0x07, data[34] & 0x0F);
851 printf("Data signal input hold %c%d.%d nS\n",
852 (data[35] & 0x80) ? '-' : '+',
853 (data[35] >> 4) & 0x07, data[35] & 0x0F);
wdenk4b9206e2004-03-23 22:14:11 +0000854 puts ("Manufacturer's JEDEC ID ");
wdenk81a88242002-10-26 15:22:42 +0000855 for(j = 64; j <= 71; j++)
856 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000857 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000858 printf("Manufacturing Location %02X\n", data[72]);
wdenk4b9206e2004-03-23 22:14:11 +0000859 puts ("Manufacturer's Part Number ");
wdenk81a88242002-10-26 15:22:42 +0000860 for(j = 73; j <= 90; j++)
861 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000862 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000863 printf("Revision Code %02X %02X\n", data[91], data[92]);
864 printf("Manufacturing Date %02X %02X\n", data[93], data[94]);
wdenk4b9206e2004-03-23 22:14:11 +0000865 puts ("Assembly Serial Number ");
wdenk81a88242002-10-26 15:22:42 +0000866 for(j = 95; j <= 98; j++)
867 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000868 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000869 printf("Speed rating PC%d\n",
870 data[126] == 0x66 ? 66 : data[126]);
871
872 return 0;
873}
874#endif /* CFG_CMD_SDRAM */
875
wdenk8bde7f72003-06-27 21:31:46 +0000876
877/***************************************************/
878
wdenk0d498392003-07-01 21:06:45 +0000879U_BOOT_CMD(
880 imd, 4, 1, do_i2c_md, \
wdenk8bde7f72003-06-27 21:31:46 +0000881 "imd - i2c memory display\n", \
882 "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \
883);
884
wdenk0d498392003-07-01 21:06:45 +0000885U_BOOT_CMD(
886 imm, 3, 1, do_i2c_mm,
wdenk8bde7f72003-06-27 21:31:46 +0000887 "imm - i2c memory modify (auto-incrementing)\n",
888 "chip address[.0, .1, .2]\n"
889 " - memory modify, auto increment address\n"
890);
wdenk0d498392003-07-01 21:06:45 +0000891U_BOOT_CMD(
892 inm, 3, 1, do_i2c_nm,
wdenk8bde7f72003-06-27 21:31:46 +0000893 "inm - memory modify (constant address)\n",
894 "chip address[.0, .1, .2]\n - memory modify, read and keep address\n"
895);
896
wdenk0d498392003-07-01 21:06:45 +0000897U_BOOT_CMD(
898 imw, 5, 1, do_i2c_mw,
wdenk8bde7f72003-06-27 21:31:46 +0000899 "imw - memory write (fill)\n",
900 "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n"
901);
902
wdenk0d498392003-07-01 21:06:45 +0000903U_BOOT_CMD(
904 icrc32, 5, 1, do_i2c_crc,
wdenk8bde7f72003-06-27 21:31:46 +0000905 "icrc32 - checksum calculation\n",
906 "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n"
907);
908
wdenk0d498392003-07-01 21:06:45 +0000909U_BOOT_CMD(
910 iprobe, 1, 1, do_i2c_probe,
wdenk8bde7f72003-06-27 21:31:46 +0000911 "iprobe - probe to discover valid I2C chip addresses\n",
912 "\n -discover valid I2C chip addresses\n"
913);
914
915/*
916 * Require full name for "iloop" because it is an infinite loop!
917 */
wdenk0d498392003-07-01 21:06:45 +0000918U_BOOT_CMD(
919 iloop, 5, 1, do_i2c_loop,
wdenk8bde7f72003-06-27 21:31:46 +0000920 "iloop - infinite loop on address range\n",
921 "chip address[.0, .1, .2] [# of objects]\n"
922 " - loop, reading a set of addresses\n"
923);
924
925#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
wdenk0d498392003-07-01 21:06:45 +0000926U_BOOT_CMD(
927 isdram, 2, 1, do_sdram,
wdenk8bde7f72003-06-27 21:31:46 +0000928 "isdram - print SDRAM configuration information\n",
929 "chip\n - print SDRAM configuration information\n"
930 " (valid chip values 50..57)\n"
931);
932#endif
wdenk81a88242002-10-26 15:22:42 +0000933#endif /* CFG_CMD_I2C */