Minkyu Kang | 6b96a20 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 1 | /* |
SRICHARAN R | d417d1db5f | 2012-03-12 19:49:32 +0000 | [diff] [blame] | 2 | * |
| 3 | * Common layer for reset related functionality of OMAP based socs. |
| 4 | * |
| 5 | * (C) Copyright 2012 |
| 6 | * Texas Instruments, <www.ti.com> |
| 7 | * |
| 8 | * Sricharan R <r.sricharan@ti.com> |
Minkyu Kang | 6b96a20 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 9 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
Minkyu Kang | 6b96a20 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 11 | */ |
Minkyu Kang | 6b96a20 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 12 | #include <config.h> |
SRICHARAN R | d417d1db5f | 2012-03-12 19:49:32 +0000 | [diff] [blame] | 13 | #include <asm/io.h> |
| 14 | #include <asm/arch/cpu.h> |
| 15 | #include <linux/compiler.h> |
Minkyu Kang | 6b96a20 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 16 | |
SRICHARAN R | d417d1db5f | 2012-03-12 19:49:32 +0000 | [diff] [blame] | 17 | void __weak reset_cpu(unsigned long ignored) |
| 18 | { |
| 19 | writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); |
| 20 | } |
Lokesh Vutla | 7023950 | 2012-05-29 19:26:41 +0000 | [diff] [blame] | 21 | |
| 22 | u32 __weak warm_reset(void) |
| 23 | { |
| 24 | return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK); |
| 25 | } |
Lokesh Vutla | 0b1b60c | 2013-04-17 20:49:40 +0000 | [diff] [blame] | 26 | |
| 27 | void __weak setup_warmreset_time(void) |
| 28 | { |
| 29 | } |