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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Benard3cbeb0f2014-04-04 19:05:55 +02002/*
3 * Copyright (C) 2014 Eukréa Electromatique
4 * Author: Eric Bénard <eric@eukrea.com>
5 *
6 * Configuration settings for the Embest RIoTboard
7 *
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
Eric Benard3cbeb0f2014-04-04 19:05:55 +020010 */
11
12#ifndef __RIOTBOARD_CONFIG_H
13#define __RIOTBOARD_CONFIG_H
14
Eric Benard3cbeb0f2014-04-04 19:05:55 +020015#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc1"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020017
18#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
19
Eric Benard3cbeb0f2014-04-04 19:05:55 +020020/* Size of malloc() pool */
21#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
22
Eric Benard3cbeb0f2014-04-04 19:05:55 +020023/* I2C Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020024#define CONFIG_SYS_I2C
25#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020026#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
27#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070028#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020029#define CONFIG_SYS_I2C_SPEED 100000
30
31/* USB Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020032#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
33#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
34#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
35#define CONFIG_MXC_USB_FLAGS 0
36
37/* MMC Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020038#define CONFIG_SYS_FSL_ESDHC_ADDR 0
39
Eric Benard3cbeb0f2014-04-04 19:05:55 +020040#define CONFIG_FEC_MXC
Eric Benard3cbeb0f2014-04-04 19:05:55 +020041#define IMX_FEC_BASE ENET_BASE_ADDR
42#define CONFIG_FEC_XCV_TYPE RGMII
43#define CONFIG_ETHPRIME "FEC"
44#define CONFIG_FEC_MXC_PHYADDR 4
45
Eric Benard3cbeb0f2014-04-04 19:05:55 +020046#define CONFIG_ARP_TIMEOUT 200UL
47
Eric Benard3cbeb0f2014-04-04 19:05:55 +020048/* Physical Memory Map */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020049#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
50
51#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
52#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
53#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
54
55#define CONFIG_SYS_INIT_SP_OFFSET \
56 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
57#define CONFIG_SYS_INIT_SP_ADDR \
58 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
59
Peter Robinson056845c2015-05-22 17:30:45 +010060/* Environment organization */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020061
62#if defined(CONFIG_ENV_IS_IN_MMC)
63/* RiOTboard */
Iain Patonc86efd82014-12-14 14:51:46 +000064#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020065#define CONFIG_SYS_FSL_USDHC_NUM 3
Eric Benard3cbeb0f2014-04-04 19:05:55 +020066#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
67/* MarSBoard */
Iain Patonc86efd82014-12-14 14:51:46 +000068#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020069#define CONFIG_SYS_FSL_USDHC_NUM 2
Eric Benard3cbeb0f2014-04-04 19:05:55 +020070#endif
71
Eric Benard3cbeb0f2014-04-04 19:05:55 +020072/* Framebuffer */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020073#define CONFIG_VIDEO_LOGO
74#define CONFIG_VIDEO_BMP_LOGO
Eric Benard3cbeb0f2014-04-04 19:05:55 +020075#define CONFIG_IMX_HDMI
76#define CONFIG_IMX_VIDEO_SKIP
77
Peter Robinsone51c1e82015-05-22 17:30:52 +010078#include "mx6_common.h"
Iain Paton729d2a32014-12-14 14:51:32 +000079
Fabien Lahoudere725019b2018-11-08 11:28:05 +010080#ifdef CONFIG_SPL
81#include "imx6_spl.h"
82/* RiOTboard */
83#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
84#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
85#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
86
87#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
88#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
89#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
90
91#endif
92
Iain Patonc86efd82014-12-14 14:51:46 +000093/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
94 * 1M script, 1M pxe and the ramdisk at the end */
95#define MEM_LAYOUT_ENV_SETTINGS \
96 "bootm_size=0x10000000\0" \
97 "kernel_addr_r=0x12000000\0" \
98 "fdt_addr_r=0x13000000\0" \
99 "scriptaddr=0x13100000\0" \
100 "pxefile_addr_r=0x13200000\0" \
101 "ramdisk_addr_r=0x13300000\0"
102
103#define BOOT_TARGET_DEVICES(func) \
104 func(MMC, mmc, 0) \
105 func(MMC, mmc, 1) \
106 func(MMC, mmc, 2) \
107 func(USB, usb, 0) \
108 func(PXE, pxe, na) \
109 func(DHCP, dhcp, na)
110
111#include <config_distro_bootcmd.h>
112
113#define CONSOLE_STDIN_SETTINGS \
114 "stdin=serial\0"
115
116#define CONSOLE_STDOUT_SETTINGS \
117 "stdout=serial\0" \
118 "stderr=serial\0"
119
120#define CONSOLE_ENV_SETTINGS \
121 CONSOLE_STDIN_SETTINGS \
122 CONSOLE_STDOUT_SETTINGS
123
124#define CONFIG_EXTRA_ENV_SETTINGS \
125 CONSOLE_ENV_SETTINGS \
126 MEM_LAYOUT_ENV_SETTINGS \
127 "fdtfile=" CONFIG_FDTFILE "\0" \
Fabio Berton0f29a612017-07-10 17:04:11 -0300128 "finduuid=part uuid mmc 0:1 uuid\0" \
Iain Patonc86efd82014-12-14 14:51:46 +0000129 BOOTENV
130
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200131#endif /* __RIOTBOARD_CONFIG_H */