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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08002/*
3 * Copyright (C) 2015 Freescale Semiconductor
Yangbo Lu34f39ce2021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08005 */
6
7#ifndef __LS1043A_COMMON_H
8#define __LS1043A_COMMON_H
9
Sumit Garg4139b172017-03-30 09:52:38 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_FMAN
13#define SPL_NO_DSPI
14#define SPL_NO_PCIE
15#define SPL_NO_ENV
16#define SPL_NO_MISC
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#define SPL_NO_QE
20#define SPL_NO_EEPROM
21#endif
22#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23#define SPL_NO_MMC
24#endif
Yangbo Lu3c7d6472017-09-15 09:51:58 +080025#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
Sumit Garg4139b172017-03-30 09:52:38 +053026#define SPL_NO_IFC
27#endif
28
Bharat Bhushan5344c7b2017-03-22 12:06:27 +053029#include <asm/arch/stream_id_lsch2.h>
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080030#include <asm/arch/config.h>
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080031
32/* Link Definitions */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080033
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080034#define CONFIG_VERY_BIG_RAM
35#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
36#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
37#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Shaohui Xiee994ddd2015-11-23 15:23:48 +080038#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080039
Michael Walle3d3fe8b2020-06-01 21:53:26 +020040#define CPU_RELEASE_ADDR secondary_boot_addr
Hou Zhiqiang831c0682015-10-26 19:47:57 +080041
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080042/* Serial Port */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080043#define CONFIG_SYS_NS16550_SERIAL
44#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang904110c2017-01-10 16:44:15 +080045#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080046
Gong Qianyuc7ca8b02015-10-26 19:47:56 +080047/* SD boot SPL */
48#ifdef CONFIG_SD_BOOT
Udit Agarwal5536c3c2019-11-07 16:11:32 +000049#ifdef CONFIG_NXP_ESBC
Ruchika Gupta70f96612017-04-17 18:07:17 +053050#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
51/*
52 * HDR would be appended at end of image and copied to DDR along
53 * with U-Boot image. Here u-boot max. size is 512K. So if binary
54 * size increases then increase this size in case of secure boot as
55 * it uses raw u-boot image instead of fit image.
56 */
57#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
58#else
59#define CONFIG_SYS_MONITOR_LEN 0x100000
Udit Agarwal5536c3c2019-11-07 16:11:32 +000060#endif /* ifdef CONFIG_NXP_ESBC */
Gong Qianyuc7ca8b02015-10-26 19:47:56 +080061#endif
62
Gong Qianyu3ad44722015-10-26 19:47:53 +080063/* NAND SPL */
64#ifdef CONFIG_NAND_BOOT
Simon Glass98463902022-10-20 18:22:39 -060065#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
66#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
Ruchika Gupta762f92a2017-04-17 18:07:18 +053067
Udit Agarwal5536c3c2019-11-07 16:11:32 +000068#ifdef CONFIG_NXP_ESBC
Ruchika Gupta762f92a2017-04-17 18:07:18 +053069#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
Udit Agarwal5536c3c2019-11-07 16:11:32 +000070#endif /* ifdef CONFIG_NXP_ESBC */
Ruchika Gupta762f92a2017-04-17 18:07:18 +053071
72#ifdef CONFIG_U_BOOT_HDR_SIZE
73/*
74 * HDR would be appended at end of image and copied to DDR along
75 * with U-Boot image. Here u-boot max. size is 512K. So if binary
76 * size increases then increase this size in case of secure boot as
77 * it uses raw u-boot image instead of fit image.
78 */
79#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
80#else
81#define CONFIG_SYS_MONITOR_LEN 0x100000
82#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
83
Gong Qianyu3ad44722015-10-26 19:47:53 +080084#endif
85
Biwen Libe7b6d52021-02-05 19:01:56 +080086/* GPIO */
Biwen Libe7b6d52021-02-05 19:01:56 +080087
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080088/* IFC */
Sumit Garg4139b172017-03-30 09:52:38 +053089#ifndef SPL_NO_IFC
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +000090#if defined(CONFIG_TFABOOT) || \
91 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080092/*
93 * CONFIG_SYS_FLASH_BASE has the final address (core view)
94 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
95 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
Simon Glass98463902022-10-20 18:22:39 -060096 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080097 */
98#define CONFIG_SYS_FLASH_BASE 0x60000000
99#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
100#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
101
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900102#ifdef CONFIG_MTD_NOR_FLASH
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800103#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
104#endif
Gong Qianyu166ef1e2016-01-25 15:16:06 +0800105#endif
Sumit Garg4139b172017-03-30 09:52:38 +0530106#endif
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800107
108/* I2C */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800109
Gong Qianyue0579a52016-01-25 15:16:05 +0800110/* DSPI */
Gong Qianyue0579a52016-01-25 15:16:05 +0800111
Shaohui Xiee8297342015-10-26 19:47:54 +0800112/* FMan ucode */
Sumit Garg4139b172017-03-30 09:52:38 +0530113#ifndef SPL_NO_FMAN
Shaohui Xiee8297342015-10-26 19:47:54 +0800114#define CONFIG_SYS_DPAA_FMAN
115#ifdef CONFIG_SYS_DPAA_FMAN
116#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
Shaohui Xiee8297342015-10-26 19:47:54 +0800117#endif
Sumit Garg4139b172017-03-30 09:52:38 +0530118#endif
Shaohui Xiee8297342015-10-26 19:47:54 +0800119
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800120/* Miscellaneous configurable options */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800121
122#define CONFIG_HWCONFIG
123#define HWCONFIG_BUFFER_SIZE 128
124
Sumit Garg4139b172017-03-30 09:52:38 +0530125#ifndef SPL_NO_MISC
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800126#define BOOT_TARGET_DEVICES(func) \
127 func(MMC, mmc, 0) \
Mian Yousaf Kaukab688cdf42019-01-29 16:38:40 +0100128 func(USB, usb, 0) \
129 func(DHCP, dhcp, na)
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800130#include <config_distro_bootcmd.h>
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800131
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800132/* Initial environment variables */
133#define CONFIG_EXTRA_ENV_SETTINGS \
134 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800135 "fdt_high=0xffffffffffffffff\0" \
136 "initrd_high=0xffffffffffffffff\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530137 "kernel_addr=0x61000000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800138 "scriptaddr=0x80000000\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530139 "scripthdraddr=0x80080000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800140 "fdtheader_addr_r=0x80100000\0" \
141 "kernelheader_addr_r=0x80200000\0" \
142 "kernel_addr_r=0x81000000\0" \
Wen Heeb967b92018-11-20 16:55:25 +0800143 "kernel_start=0x1000000\0" \
144 "kernelheader_start=0x800000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800145 "fdt_addr_r=0x90000000\0" \
146 "load_addr=0xa0000000\0" \
Manish Tomar507103f2020-11-05 14:08:55 +0530147 "kernelheader_addr=0x60600000\0" \
Qianyu Gongad6767b2016-03-15 16:35:57 +0800148 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530149 "kernelheader_size=0x40000\0" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800150 "kernel_addr_sd=0x8000\0" \
151 "kernel_size_sd=0x14000\0" \
Manish Tomar507103f2020-11-05 14:08:55 +0530152 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530153 "kernelhdr_size_sd=0x10\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800154 "console=ttyS0,115200\0" \
York Sun23af4842017-09-28 08:42:16 -0700155 "boot_os=y\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800156 BOOTENV \
157 "boot_scripts=ls1043ardb_boot.scr\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530158 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800159 "scan_dev_for_boot_part=" \
160 "part list ${devtype} ${devnum} devplist; " \
161 "env exists devplist || setenv devplist 1; " \
162 "for distro_bootpart in ${devplist}; do " \
163 "if fstype ${devtype} " \
164 "${devnum}:${distro_bootpart} " \
165 "bootfstype; then " \
166 "run scan_dev_for_boot; " \
167 "fi; " \
168 "done\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530169 "boot_a_script=" \
170 "load ${devtype} ${devnum}:${distro_bootpart} " \
171 "${scriptaddr} ${prefix}${script}; " \
172 "env exists secureboot && load ${devtype} " \
173 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai78c58082019-04-23 05:52:17 +0000174 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
175 "env exists secureboot " \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530176 "&& esbc_validate ${scripthdraddr};" \
177 "source ${scriptaddr}\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800178 "qspi_bootcmd=echo Trying load from qspi..;" \
179 "sf probe && sf read $load_addr " \
Wen He283e4ab2019-11-14 15:08:15 +0800180 "$kernel_start $kernel_size; env exists secureboot " \
181 "&& sf read $kernelheader_addr_r $kernelheader_start " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530182 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
183 "bootm $load_addr#$board\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800184 "nor_bootcmd=echo Trying load from nor..;" \
185 "cp.b $kernel_addr $load_addr " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530186 "$kernel_size; env exists secureboot " \
187 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
188 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
189 "bootm $load_addr#$board\0" \
Wen Heeb967b92018-11-20 16:55:25 +0800190 "nand_bootcmd=echo Trying load from NAND..;" \
191 "nand info; nand read $load_addr " \
192 "$kernel_start $kernel_size; env exists secureboot " \
193 "&& nand read $kernelheader_addr_r $kernelheader_start " \
194 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
195 "bootm $load_addr#$board\0" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800196 "sd_bootcmd=echo Trying load from SD ..;" \
197 "mmcinfo; mmc read $load_addr " \
198 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530199 "env exists secureboot && mmc read $kernelheader_addr_r " \
200 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
201 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800202 "bootm $load_addr#$board\0"
203
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800204
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +0000205#ifdef CONFIG_TFABOOT
206#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
207 "env exists secureboot && esbc_halt;"
208#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
209 "env exists secureboot && esbc_halt;"
210#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
211 "env exists secureboot && esbc_halt;"
Pankit Garg1f3d7392018-12-27 04:37:53 +0000212#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
213 "env exists secureboot && esbc_halt;"
Sumit Garg4139b172017-03-30 09:52:38 +0530214#endif
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +0000215#endif
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800216
Simon Glass457e51c2017-05-17 08:23:10 -0600217#include <asm/arch/soc.h>
218
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800219#endif /* __LS1043A_COMMON_H */