blob: c1edef4436082fcfca0b13ccd41c1bcc80afa6cd [file] [log] [blame]
Simon Glass0324b712020-07-07 21:32:17 -06001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * ACPI driver for DA7219 codec
4 *
5 * Copyright 2019 Google LLC
6 * Parts taken from coreboot
7 */
8
9#include <common.h>
10#include <dm.h>
11#include <i2c.h>
12#include <irq.h>
13#include <log.h>
14#include <acpi/acpigen.h>
15#include <acpi/acpi_device.h>
16#include <acpi/acpi_dp.h>
17#ifdef CONFIG_X86
18#include <asm/acpi_nhlt.h>
19#endif
20#include <asm-generic/gpio.h>
21#include <dt-bindings/sound/nhlt.h>
22#include <dm/acpi.h>
23
24#define DA7219_ACPI_HID "DLGS7219"
25
Heinrich Schuchardtd1a03e62022-06-12 13:15:34 +000026__maybe_unused
Simon Glass0324b712020-07-07 21:32:17 -060027static int da7219_acpi_fill_ssdt(const struct udevice *dev,
28 struct acpi_ctx *ctx)
29{
30 char scope[ACPI_PATH_MAX];
31 char name[ACPI_NAME_MAX];
32 struct acpi_dp *dsd, *aad;
33 ofnode node;
34 u32 val;
35 int ret;
36
37 ret = acpi_device_scope(dev, scope, sizeof(scope));
38 if (ret)
39 return log_msg_ret("scope", ret);
40 ret = acpi_get_name(dev, name);
41 if (ret)
42 return log_msg_ret("name", ret);
43
44 /* Device */
45 acpigen_write_scope(ctx, scope);
46 acpigen_write_device(ctx, name);
47 acpigen_write_name_string(ctx, "_HID", DA7219_ACPI_HID);
48 acpigen_write_name_integer(ctx, "_UID", 1);
49 acpigen_write_name_string(ctx, "_DDN",
50 dev_read_string(dev, "acpi,ddn"));
51 acpigen_write_name_integer(ctx, "_S0W", 4);
52 acpigen_write_sta(ctx, acpi_device_status(dev));
53
54 /* Resources */
55 acpigen_write_name(ctx, "_CRS");
56 acpigen_write_resourcetemplate_header(ctx);
57 ret = acpi_device_write_i2c_dev(ctx, dev);
Simon Glassdd30c5b2020-11-04 09:57:29 -070058 if (ret < 0)
Simon Glass0324b712020-07-07 21:32:17 -060059 return log_msg_ret("i2c", ret);
60
61 /* Use either Interrupt() or GpioInt() */
62 ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
63 "req-gpios");
Simon Glassdd30c5b2020-11-04 09:57:29 -070064 if (ret < 0)
Simon Glass0324b712020-07-07 21:32:17 -060065 return log_msg_ret("irq_gpio", ret);
66 acpigen_write_resourcetemplate_footer(ctx);
67
68 /* AAD Child Device Properties */
69 aad = acpi_dp_new_table("DAAD");
70 if (!aad)
71 return log_msg_ret("aad", -ENOMEM);
72
73 node = ofnode_find_subnode(dev_ofnode(dev), "da7219_aad");
74 if (!ofnode_valid(node))
75 return log_msg_ret("da7219_aad", -EINVAL);
76 acpi_dp_ofnode_copy_int(node, aad, "dlg,btn-cfg");
77 acpi_dp_ofnode_copy_int(node, aad, "dlg,mic-det-thr");
78 acpi_dp_ofnode_copy_int(node, aad, "dlg,jack-ins-deb");
79 acpi_dp_ofnode_copy_str(node, aad, "dlg,jack-det-rate");
80 acpi_dp_ofnode_copy_int(node, aad, "dlg,jack-rem-deb");
81 acpi_dp_ofnode_copy_int(node, aad, "dlg,a-d-btn-thr");
82 acpi_dp_ofnode_copy_int(node, aad, "dlg,d-b-btn-thr");
83 acpi_dp_ofnode_copy_int(node, aad, "dlg,b-c-btn-thr");
84 acpi_dp_ofnode_copy_int(node, aad, "dlg,c-mic-btn-thr");
85 acpi_dp_ofnode_copy_int(node, aad, "dlg,btn-avg");
86 acpi_dp_ofnode_copy_int(node, aad, "dlg,adc-1bit-rpt");
87 if (!ofnode_read_u32(node, "dlg,micbias-pulse-lvl", &val)) {
88 acpi_dp_ofnode_copy_int(node, aad, "dlg,micbias-pulse-lvl");
89 acpi_dp_ofnode_copy_int(node, aad, "dlg,micbias-pulse-time");
90 }
91
92 /* DA7219 Properties */
93 dsd = acpi_dp_new_table("_DSD");
94 if (!dsd)
95 return log_msg_ret("dsd", -ENOMEM);
96 acpi_dp_dev_copy_int(dev, dsd, "dlg,micbias-lvl");
97 acpi_dp_dev_copy_str(dev, dsd, "dlg,mic-amp-in-sel");
98 acpi_dp_dev_copy_str(dev, dsd, "dlg,mclk-name");
99 acpi_dp_add_child(dsd, "da7219_aad", aad);
100
101 /* Write Device Property Hierarchy */
102 acpi_dp_write(ctx, dsd);
103
104 acpigen_pop_len(ctx); /* Device */
105 acpigen_pop_len(ctx); /* Scope */
106
107 return 0;
108}
109
110/* For now only X86 boards support NHLT */
111#ifdef CONFIG_X86
112static const struct nhlt_format_config da7219_formats[] = {
113 /* 48 KHz 24-bits per sample. */
114 {
115 .num_channels = 2,
116 .sample_freq_khz = 48,
117 .container_bits_per_sample = 32,
118 .valid_bits_per_sample = 24,
119 .settings_file = "dialog-2ch-48khz-24b.dat",
120 },
121};
122
123static const struct nhlt_tdm_config tdm_config = {
124 .virtual_slot = 0,
125 .config_type = NHLT_TDM_BASIC,
126};
127
128static const struct nhlt_endp_descriptor da7219_descriptors[] = {
129 /* Render Endpoint */
130 {
131 .link = NHLT_LINK_SSP,
132 .device = NHLT_SSP_DEV_I2S,
133 .direction = NHLT_DIR_RENDER,
134 .vid = NHLT_VID,
135 .did = NHLT_DID_SSP,
136 .cfg = &tdm_config,
137 .cfg_size = sizeof(tdm_config),
138 .formats = da7219_formats,
139 .num_formats = ARRAY_SIZE(da7219_formats),
140 },
141 /* Capture Endpoint */
142 {
143 .link = NHLT_LINK_SSP,
144 .device = NHLT_SSP_DEV_I2S,
145 .direction = NHLT_DIR_CAPTURE,
146 .vid = NHLT_VID,
147 .did = NHLT_DID_SSP,
148 .cfg = &tdm_config,
149 .cfg_size = sizeof(tdm_config),
150 .formats = da7219_formats,
151 .num_formats = ARRAY_SIZE(da7219_formats),
152 },
153};
154
155static int da7219_acpi_setup_nhlt(const struct udevice *dev,
156 struct acpi_ctx *ctx)
157{
158 u32 hwlink;
159 int ret;
160
161 if (dev_read_u32(dev, "acpi,audio-link", &hwlink))
162 return log_msg_ret("link", -EINVAL);
163
164 /* Virtual bus id of SSP links are the hardware port ids proper. */
165 ret = nhlt_add_ssp_endpoints(ctx->nhlt, hwlink, da7219_descriptors,
166 ARRAY_SIZE(da7219_descriptors));
167 if (ret)
168 return log_msg_ret("add", ret);
169
170 return 0;
171}
172#endif
173
174struct acpi_ops da7219_acpi_ops = {
Heinrich Schuchardtd1a03e62022-06-12 13:15:34 +0000175#ifdef CONFIG_ACPIGEN
Simon Glass0324b712020-07-07 21:32:17 -0600176 .fill_ssdt = da7219_acpi_fill_ssdt,
177#ifdef CONFIG_X86
178 .setup_nhlt = da7219_acpi_setup_nhlt,
179#endif
Heinrich Schuchardtd1a03e62022-06-12 13:15:34 +0000180#endif
Simon Glass0324b712020-07-07 21:32:17 -0600181};
182
183static const struct udevice_id da7219_ids[] = {
184 { .compatible = "dlg,da7219" },
185 { }
186};
187
188U_BOOT_DRIVER(da7219) = {
189 .name = "da7219",
190 .id = UCLASS_MISC,
191 .of_match = da7219_ids,
192 ACPI_OPS_PTR(&da7219_acpi_ops)
193};