blob: 5645a8d4772dbd2c973ab981ac4df2d7f3a93593 [file] [log] [blame]
Stephen Warrenf3d93302012-05-21 10:04:27 +00001/dts-v1/;
2
3/include/ ARCH_CPU_DTS
4
5/ {
Allen Martin00a27492012-08-31 08:30:00 +00006 model = "NVIDIA Tegra20 Harmony evaluation board";
Stephen Warrenf3d93302012-05-21 10:04:27 +00007 compatible = "nvidia,harmony", "nvidia,tegra20";
8
9 aliases {
10 usb0 = "/usb@c5008000";
Stephen Warren699c40e2012-10-12 09:45:48 +000011 usb1 = "/usb@c5004000";
Stephen Warrenf3d93302012-05-21 10:04:27 +000012 };
13
14 memory {
15 reg = <0x00000000 0x40000000>;
16 };
17
18 clocks {
19 clk_32k: clk_32k {
20 clock-frequency = <32000>;
21 };
22 osc {
23 clock-frequency = <12000000>;
24 };
25 };
26
27 clock@60006000 {
28 clocks = <&clk_32k &osc>;
29 };
30
31 serial@70006300 {
32 clock-frequency = < 216000000 >;
33 };
34
35 i2c@7000c000 {
36 status = "disabled";
37 };
38
39 i2c@7000c400 {
40 status = "disabled";
41 };
42
43 i2c@7000c500 {
44 status = "disabled";
45 };
46
47 i2c@7000d000 {
48 status = "disabled";
49 };
50
51 usb@c5000000 {
52 status = "disabled";
53 };
54
55 usb@c5004000 {
Stephen Warren699c40e2012-10-12 09:45:48 +000056 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
Stephen Warrenf3d93302012-05-21 10:04:27 +000057 };
Stephen Warren9614a1e2012-07-30 07:37:52 +000058
59 nand-controller@70008000 {
60 nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
61 nvidia,width = <8>;
62 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
63 nand@0 {
64 reg = <0>;
65 compatible = "hynix,hy27uf4g2b", "nand-flash";
66 };
67 };
Stephen Warrenf3d93302012-05-21 10:04:27 +000068};