blob: 2e10412615a92768a8737b949ed0393182c73dab [file] [log] [blame]
wdenk37bd3212002-11-03 11:21:28 +00001/*
2 * (C) Copyright 2000
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "cpciiser4.h"
26#include <asm/processor.h>
27#include <command.h>
28#include <cmd_boot.h>
29
30/* ------------------------------------------------------------------------- */
31
32#if 0
33#define FPGA_DEBUG
34#endif
35
36#if 0
37#define FPGA_DEBUG2
38#endif
39
40/* fpga configuration data - generated by bin2cc */
41const unsigned char fpgadata[] = {
42#include "fpgadata.c"
43};
44
45/*
46 * include common fpga code (for esd boards)
47 */
48#include "../common/fpga.c"
49
50
51int board_pre_init (void)
52{
53 DECLARE_GLOBAL_DATA_PTR;
54
55 int index, len, i;
56 volatile unsigned char dummy;
57 int status;
58
59#ifdef FPGA_DEBUG
60 /* set up serial port with default baudrate */
61 (void) get_clocks ();
62 gd->baudrate = CONFIG_BAUDRATE;
63 serial_init ();
64 console_init_f ();
65#endif
66
67 /*
68 * Boot onboard FPGA
69 */
70 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
71 if (status != 0) {
72 /* booting FPGA failed */
73#ifndef FPGA_DEBUG
74 /* set up serial port with default baudrate */
75 (void) get_clocks ();
76 gd->baudrate = CONFIG_BAUDRATE;
77 serial_init ();
78 console_init_f ();
79#endif
80 printf ("\nFPGA: Booting failed ");
81 switch (status) {
82 case ERROR_FPGA_PRG_INIT_LOW:
83 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
84 break;
85 case ERROR_FPGA_PRG_INIT_HIGH:
86 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
87 break;
88 case ERROR_FPGA_PRG_DONE:
89 printf ("(Timeout: DONE not high after programming FPGA)\n ");
90 break;
91 }
92
93 /* display infos on fpgaimage */
94 index = 15;
95 for (i = 0; i < 4; i++) {
96 len = fpgadata[index];
97 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
98 index += len + 3;
99 }
100 putc ('\n');
101 /* delayed reboot */
102 for (i = 20; i > 0; i--) {
103 printf ("Rebooting in %2d seconds \r", i);
104 for (index = 0; index < 1000; index++)
105 udelay (1000);
106 }
107 putc ('\n');
108 do_reset (NULL, 0, 0, NULL);
109 }
110
111 /*
112 * Init FPGA via RESET (read access on CS3)
113 */
114 dummy = *(unsigned char *) 0xf0200000;
115
116 /*
117 * IRQ 0-15 405GP internally generated; active high; level sensitive
118 * IRQ 16 405GP internally generated; active low; level sensitive
119 * IRQ 17-24 RESERVED
120 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
121 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
122 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
123 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
124 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
125 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
126 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
127 */
128 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
129 mtdcr (uicer, 0x00000000); /* disable all ints */
130 mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
131 /* mtdcr(uicpr, 0xFFFFFF81); / set int polarities */
132 mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
133 mtdcr (uictr, 0x10000000); /* set int trigger levels */
134 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
135 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
136
137 return 0;
138}
139
140
141/* ------------------------------------------------------------------------- */
142
143/*
144 * Check Board Identity:
145 */
146
147int checkboard (void)
148{
149 int index;
150 int len;
151 unsigned char str[64];
152 int i = getenv_r ("serial#", str, sizeof (str));
153
154 puts ("Board: ");
155
156 if (!i || strncmp (str, "CPCIISER4", 9)) {
157 puts ("### No HW ID - assuming CPCIISER4\n");
158 return (0);
159 }
160
161 puts (str);
162
163 puts ("\nFPGA: ");
164
165 /* display infos on fpgaimage */
166 index = 15;
167 for (i = 0; i < 4; i++) {
168 len = fpgadata[index];
169 printf ("%s ", &(fpgadata[index + 1]));
170 index += len + 3;
171 }
172
173 putc ('\n');
174
175 return 0;
176}
177
178/* ------------------------------------------------------------------------- */
179
180long int initdram (int board_type)
181{
182 return (16 * 1024 * 1024);
183}
184
185/* ------------------------------------------------------------------------- */
186
187int testdram (void)
188{
189 /* TODO: XXX XXX XXX */
190 printf ("test: 16 MB - ok\n");
191
192 return (0);
193}
194
195/* ------------------------------------------------------------------------- */