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Sandeep Paulraj840f8922010-12-28 15:43:16 -05001/*
2 * LSI ET1011C PHY Driver for TI DaVinci(TMS320DM6467) board.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Sandeep Paulraj840f8922010-12-28 15:43:16 -05007 */
8
9#include <common.h>
10#include <net.h>
11#include <miiphy.h>
12#include <asm/arch/emac_defs.h>
Masahiro Yamada601fbec2015-02-20 17:04:05 +090013#include "../../../drivers/net/davinci_emac.h"
Sandeep Paulraj840f8922010-12-28 15:43:16 -050014
15#ifdef CONFIG_DRIVER_TI_EMAC
16
17#ifdef CONFIG_CMD_NET
18
19/* LSI PHYSICAL LAYER TRANSCEIVER ET1011C */
20
21#define MII_PHY_CONFIG_REG 22
22
23/* PHY Config bits */
24#define PHY_SYS_CLK_EN (1 << 4)
25
26int et1011c_get_link_speed(int phy_addr)
27{
28 u_int16_t data;
29
30 if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
Manjunath Hadlifb1d6332011-10-13 03:40:55 +000031 davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data);
Sandeep Paulraj840f8922010-12-28 15:43:16 -050032 /* Enable 125MHz clock sourced from PHY */
Manjunath Hadlifb1d6332011-10-13 03:40:55 +000033 davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG,
Sandeep Paulraj840f8922010-12-28 15:43:16 -050034 data | PHY_SYS_CLK_EN);
35 return (1);
36 }
37 return (0);
38}
39
40#endif /* CONFIG_CMD_NET */
41
42#endif /* CONFIG_DRIVER_ETHER */