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Patrick Bruenn98d62e62016-11-04 11:57:02 +01001/*
2 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
3 * Patrick Bruenn <p.bruenn@beckhoff.com>
4 *
5 * Configuration settings for Beckhoff CX9020.
6 *
7 * Based on Freescale's Linux i.MX mx53loco.h file:
8 * Copyright (C) 2010-2011 Freescale Semiconductor.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/arch/imx-regs.h>
17
18#define CONFIG_CMDLINE_TAG
19#define CONFIG_SETUP_MEMORY_TAGS
20#define CONFIG_INITRD_TAG
21
22#define CONFIG_SYS_FSL_CLK
23
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26
Patrick Bruenn98d62e62016-11-04 11:57:02 +010027#define CONFIG_MXC_GPIO
28#define CONFIG_REVISION_TAG
29
30#define CONFIG_MXC_UART_BASE UART2_BASE
31
32#define CONFIG_FPGA_COUNT 1
33
34/* MMC Configs */
35#define CONFIG_FSL_ESDHC
36#define CONFIG_SYS_FSL_ESDHC_ADDR 0
37#define CONFIG_SYS_FSL_ESDHC_NUM 2
38
Patrick Bruenn98d62e62016-11-04 11:57:02 +010039/* bootz: zImage/initrd.img support */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010040
41/* Eth Configs */
42#define CONFIG_MII
43#define IMX_FEC_BASE FEC_BASE_ADDR
44#define CONFIG_ETHPRIME "FEC0"
45#define CONFIG_FEC_MXC_PHYADDR 0x1F
46
47/* USB Configs */
Patrick Bruenn98d62e62016-11-04 11:57:02 +010048#define CONFIG_USB_EHCI_MX5
49#define CONFIG_USB_STORAGE
50#define CONFIG_USB_HOST_ETHER
51#define CONFIG_USB_ETHER_ASIX
52#define CONFIG_USB_ETHER_MCS7830
53#define CONFIG_USB_ETHER_SMSC95XX
54#define CONFIG_MXC_USB_PORT 1
55#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
56#define CONFIG_MXC_USB_FLAGS 0
57
58/* allow to overwrite serial and ethaddr */
59#define CONFIG_ENV_OVERWRITE
60#define CONFIG_CONS_INDEX 1
Patrick Bruenn98d62e62016-11-04 11:57:02 +010061
62/* Command definition */
63#define CONFIG_SUPPORT_RAW_INITRD
64
65#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
66#define CONFIG_SYS_TEXT_BASE 0x77800000
67
68#define CONFIG_EXTRA_ENV_SETTINGS \
Patrick Bruennf8e63852017-07-11 11:23:20 +020069 "fdt_addr_r=0x71ff0000\0" \
Patrick Bruennbc104a72017-07-11 11:23:21 +020070 "pxefile_addr_r=0x73000000\0" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020071 "ramdisk_addr_r=0x72000000\0" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010072 "console=ttymxc1,115200\0" \
73 "uenv=/boot/uEnv.txt\0" \
74 "optargs=\0" \
75 "cmdline=\0" \
76 "mmcdev=0\0" \
77 "mmcpart=1\0" \
78 "mmcrootfstype=ext4 rootwait fixrtc\0" \
79 "mmcargs=setenv bootargs console=${console} " \
80 "${optargs} " \
81 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
82 "rootfstype=${mmcrootfstype} " \
83 "${cmdline}\0" \
84 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
Patrick Bruennbc104a72017-07-11 11:23:21 +020085 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020086 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010087 "setenv rdsize ${filesize}\0" \
88 "loadfdt=echo loading ${fdt_path} ...;" \
Patrick Bruennf8e63852017-07-11 11:23:20 +020089 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
Patrick Bruenn98d62e62016-11-04 11:57:02 +010090 "mmcboot=mmc dev ${mmcdev}; " \
91 "if mmc rescan; then " \
92 "echo SD/MMC found on device ${mmcdev};" \
93 "echo Checking for: ${uenv} ...;" \
94 "setenv bootpart ${mmcdev}:${mmcpart};" \
95 "if test -e mmc ${bootpart} ${uenv}; then " \
96 "load mmc ${bootpart} ${loadaddr} ${uenv};" \
97 "env import -t ${loadaddr} ${filesize};" \
98 "echo Loaded environment from ${uenv};" \
99 "if test -n ${dtb}; then " \
100 "setenv fdt_file ${dtb};" \
101 "echo Using: dtb=${fdt_file} ...;" \
102 "fi;" \
103 "echo Checking for uname_r in ${uenv}...;" \
104 "if test -n ${uname_r}; then " \
105 "echo Running uname_boot ...;" \
106 "run uname_boot;" \
107 "fi;" \
108 "fi;" \
109 "fi;\0" \
110 "uname_boot="\
111 "setenv bootdir /boot; " \
112 "setenv bootfile vmlinuz-${uname_r}; " \
113 "setenv ccatfile /boot/ccat.rbf; " \
114 "echo loading CCAT firmware from ${ccatfile}; " \
115 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
116 "fpga load 0 ${loadaddr} ${filesize}; " \
117 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
118 "echo loading ${bootdir}/${bootfile} ...; " \
119 "run loadimage;" \
120 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
121 "if test -e mmc ${bootpart} ${fdt_path}; then " \
122 "run loadfdt;" \
123 "else " \
124 "echo; echo unable to find ${fdt_file} ...;" \
125 "echo booting legacy ...;"\
126 "run mmcargs;" \
127 "echo debug: [${bootargs}] ... ;" \
128 "echo debug: [bootz ${loadaddr}] ... ;" \
129 "bootz ${loadaddr}; " \
130 "fi;" \
131 "run mmcargs;" \
132 "echo debug: [${bootargs}] ... ;" \
Patrick Bruennf8e63852017-07-11 11:23:20 +0200133 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
134 "bootz ${loadaddr} - ${fdt_addr_r}; " \
Patrick Bruennbc104a72017-07-11 11:23:21 +0200135 "else " \
136 "echo loading from dhcp ...; " \
137 "run loadpxe; " \
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100138 "fi;\0"
139
140#define CONFIG_BOOTCOMMAND \
141 "run mmcboot;"
142
143#define CONFIG_ARP_TIMEOUT 200UL
144
145/* Miscellaneous configurable options */
146#define CONFIG_SYS_LONGHELP /* undef to save memory */
147#define CONFIG_AUTO_COMPLETE
148#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
149
150#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
151#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
152
153#define CONFIG_SYS_MEMTEST_START 0x70000000
154#define CONFIG_SYS_MEMTEST_END 0x70010000
155
156#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
157
158#define CONFIG_CMDLINE_EDITING
159
160/* Physical Memory Map */
161#define CONFIG_NR_DRAM_BANKS 2
162#define PHYS_SDRAM_1 CSD0_BASE_ADDR
163#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
164#define PHYS_SDRAM_2 CSD1_BASE_ADDR
165#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
166#define PHYS_SDRAM_SIZE (gd->ram_size)
167
168#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
169#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
170#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
171
172#define CONFIG_SYS_INIT_SP_OFFSET \
173 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
174#define CONFIG_SYS_INIT_SP_ADDR \
175 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
176
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900177/* environment organization */
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100178#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
179#define CONFIG_ENV_SIZE (8 * 1024)
Patrick Bruenn98d62e62016-11-04 11:57:02 +0100180#define CONFIG_SYS_MMC_ENV_DEV 0
181
182/* Framebuffer and LCD */
183#define CONFIG_PREBOOT
184#define CONFIG_VIDEO_IPUV3
185#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
186#define CONFIG_VIDEO_BMP_RLE8
187#define CONFIG_SPLASH_SCREEN
188#define CONFIG_BMP_16BPP
189#define CONFIG_VIDEO_LOGO
190#define CONFIG_IPUV3_CLK 200000000
191
192#endif /* __CONFIG_H */