Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 2 | /* |
Priyanka Singh | 3e90cfe | 2020-01-22 10:29:52 +0000 | [diff] [blame] | 3 | * Copyright 2020 NXP |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 4 | * Copyright 2016 Freescale Semiconductor, Inc. |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __LS1012ARDB_H__ |
| 8 | #define __LS1012ARDB_H__ |
| 9 | |
| 10 | #include "ls1012a_common.h" |
| 11 | |
Shengzhou Liu | b9e745b | 2016-08-26 18:30:39 +0800 | [diff] [blame] | 12 | /* DDR */ |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 13 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
| 14 | #define CONFIG_CHIP_SELECTS_PER_CTRL 1 |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 15 | #define CONFIG_SYS_SDRAM_SIZE 0x40000000 |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 16 | #define CONFIG_CMD_MEMINFO |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 17 | |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 18 | |
Kuldeep Singh | 60b0055 | 2019-09-18 14:58:11 +0530 | [diff] [blame] | 19 | /* ENV */ |
| 20 | #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 21 | /* |
| 22 | * I2C IO expander |
| 23 | */ |
| 24 | |
Yangbo Lu | 481fb01 | 2017-12-08 15:35:35 +0800 | [diff] [blame] | 25 | #define I2C_MUX_IO_ADDR 0x24 |
Calvin Johnson | 7ab1647 | 2018-03-08 15:30:30 +0530 | [diff] [blame] | 26 | #define I2C_MUX_IO2_ADDR 0x25 |
Yangbo Lu | 481fb01 | 2017-12-08 15:35:35 +0800 | [diff] [blame] | 27 | #define I2C_MUX_IO_0 0 |
| 28 | #define I2C_MUX_IO_1 1 |
| 29 | #define SW_BOOT_MASK 0x03 |
| 30 | #define SW_BOOT_EMU 0x02 |
| 31 | #define SW_BOOT_BANK1 0x00 |
| 32 | #define SW_BOOT_BANK2 0x01 |
| 33 | #define SW_REV_MASK 0xF8 |
| 34 | #define SW_REV_A 0xF8 |
| 35 | #define SW_REV_B 0xF0 |
Yangbo Lu | 4a47bf8 | 2017-12-08 15:35:36 +0800 | [diff] [blame] | 36 | #define SW_REV_C 0xE8 |
| 37 | #define SW_REV_C1 0xE0 |
| 38 | #define SW_REV_C2 0xD8 |
| 39 | #define SW_REV_D 0xD0 |
| 40 | #define SW_REV_E 0xC8 |
Calvin Johnson | 7ab1647 | 2018-03-08 15:30:30 +0530 | [diff] [blame] | 41 | #define __PHY_MASK 0xF9 |
| 42 | #define __PHY_ETH2_MASK 0xFB |
| 43 | #define __PHY_ETH1_MASK 0xFD |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 44 | |
| 45 | /* MMC */ |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 46 | #ifdef CONFIG_MMC |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 47 | #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 48 | #endif |
| 49 | |
Prabhakar Kushwaha | 9e0bb4c | 2016-12-26 12:15:08 +0530 | [diff] [blame] | 50 | |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 51 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 52 | |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 53 | #define CONFIG_PCI_SCAN_SHOW |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 54 | |
| 55 | #define CONFIG_CMD_MEMINFO |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 56 | |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 57 | #undef CONFIG_EXTRA_ENV_SETTINGS |
| 58 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 59 | "verify=no\0" \ |
| 60 | "fdt_high=0xffffffffffffffff\0" \ |
| 61 | "initrd_high=0xffffffffffffffff\0" \ |
| 62 | "fdt_addr=0x00f00000\0" \ |
| 63 | "kernel_addr=0x01000000\0" \ |
Priyanka Singh | 3e90cfe | 2020-01-22 10:29:52 +0000 | [diff] [blame] | 64 | "kernelheader_addr=0x600000\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 65 | "scriptaddr=0x80000000\0" \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 66 | "scripthdraddr=0x80080000\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 67 | "fdtheader_addr_r=0x80100000\0" \ |
| 68 | "kernelheader_addr_r=0x80200000\0" \ |
Biwen Li | 63d3464 | 2020-01-10 17:16:04 +0800 | [diff] [blame] | 69 | "kernel_addr_r=0x96000000\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 70 | "fdt_addr_r=0x90000000\0" \ |
| 71 | "load_addr=0xa0000000\0" \ |
| 72 | "kernel_size=0x2800000\0" \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 73 | "kernelheader_size=0x40000\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 74 | "console=ttyS0,115200\0" \ |
| 75 | BOOTENV \ |
| 76 | "boot_scripts=ls1012ardb_boot.scr\0" \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 77 | "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 78 | "scan_dev_for_boot_part=" \ |
| 79 | "part list ${devtype} ${devnum} devplist; " \ |
| 80 | "env exists devplist || setenv devplist 1; " \ |
| 81 | "for distro_bootpart in ${devplist}; do " \ |
| 82 | "if fstype ${devtype} " \ |
| 83 | "${devnum}:${distro_bootpart} " \ |
| 84 | "bootfstype; then " \ |
| 85 | "run scan_dev_for_boot; " \ |
| 86 | "fi; " \ |
| 87 | "done\0" \ |
| 88 | "scan_dev_for_boot=" \ |
| 89 | "echo Scanning ${devtype} " \ |
| 90 | "${devnum}:${distro_bootpart}...; " \ |
| 91 | "for prefix in ${boot_prefixes}; do " \ |
| 92 | "run scan_dev_for_scripts; " \ |
| 93 | "done;" \ |
| 94 | "\0" \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 95 | "boot_a_script=" \ |
| 96 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 97 | "${scriptaddr} ${prefix}${script}; " \ |
| 98 | "env exists secureboot && load ${devtype} " \ |
| 99 | "${devnum}:${distro_bootpart} " \ |
Vinitha V Pillai | 78c5808 | 2019-04-23 05:52:17 +0000 | [diff] [blame] | 100 | "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ |
| 101 | "env exists secureboot " \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 102 | "&& esbc_validate ${scripthdraddr};" \ |
| 103 | "source ${scriptaddr}\0" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 104 | "installer=load mmc 0:2 $load_addr " \ |
| 105 | "/flex_installer_arm64.itb; " \ |
| 106 | "bootm $load_addr#$board\0" \ |
Biwen Li | a3c9805 | 2019-11-15 15:10:14 +0800 | [diff] [blame] | 107 | "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 108 | "sf probe && sf read $load_addr " \ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 109 | "$kernel_addr $kernel_size; env exists secureboot " \ |
| 110 | "&& sf read $kernelheader_addr_r $kernelheader_addr " \ |
| 111 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 112 | "bootm $load_addr#$board\0" |
Rajesh Bhagat | a81357a | 2017-11-30 16:44:38 +0530 | [diff] [blame] | 113 | |
| 114 | #undef CONFIG_BOOTCOMMAND |
Rajesh Bhagat | 1f6180d | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 115 | #ifdef CONFIG_TFABOOT |
| 116 | #undef QSPI_NOR_BOOTCOMMAND |
| 117 | #define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ |
| 118 | "env exists secureboot && esbc_halt;" |
| 119 | #else |
Calvin Johnson | a802d1e | 2018-03-08 15:30:35 +0530 | [diff] [blame] | 120 | #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ |
Vinitha Pillai-B57223 | c883f35 | 2018-01-09 23:03:42 +0530 | [diff] [blame] | 121 | "env exists secureboot && esbc_halt;" |
Rajesh Bhagat | 1f6180d | 2018-11-05 18:02:53 +0000 | [diff] [blame] | 122 | #endif |
Vinitha Pillai-B57223 | 11d14bf | 2017-03-23 13:48:20 +0530 | [diff] [blame] | 123 | |
| 124 | #include <asm/fsl_secure_boot.h> |
| 125 | |
Prabhakar Kushwaha | 3b6e389 | 2016-06-03 18:41:35 +0530 | [diff] [blame] | 126 | #endif /* __LS1012ARDB_H__ */ |