blob: aa5de863eb623c39478efcfee99203293370cf01 [file] [log] [blame]
Michal Simek1d6c54e2018-04-12 17:39:46 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
4 */
5
6#include <common.h>
Simon Glass9a3b4ce2019-12-28 10:45:01 -07007#include <cpu_func.h>
Michal Simek1d6c54e2018-04-12 17:39:46 +02008#include <asm/armv7_mpu.h>
9
10DECLARE_GLOBAL_DATA_PTR;
11
12struct mpu_region_config region_config[] = {
13 { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
14 O_I_WB_RD_WR_ALLOC, REGION_1GB },
15 { 0x20000000, REGION_1, XN_EN, PRIV_RO_USR_RO,
16 O_I_WB_RD_WR_ALLOC, REGION_512MB },
17 { 0x40000000, REGION_2, XN_EN, PRIV_RO_USR_RO,
18 O_I_WB_RD_WR_ALLOC, REGION_1GB },
19};
20
21int arch_cpu_init(void)
22{
23 gd->cpu_clk = CONFIG_CPU_FREQ_HZ;
24
25 setup_mpu_regions(region_config, sizeof(region_config) /
26 sizeof(struct mpu_region_config));
27
28 return 0;
29}
30
31/*
32 * Perform the low-level reset.
33 */
34void reset_cpu(ulong addr)
35{
36 while (1)
37 ;
38}