blob: 18444427fedfe6358e5177c458882f371b14b1d6 [file] [log] [blame]
stroese8d8f8942004-12-16 18:24:06 +00001/*
2 * (C) Copyright 2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <malloc.h>
27#include <asm/m5249.h>
Matthias Fuchsbb57ad42009-02-20 10:19:19 +010028#include <asm/io.h>
stroese8d8f8942004-12-16 18:24:06 +000029
30
31/* Prototypes */
32int gunzip(void *, int, unsigned char *, unsigned long *);
33int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
34int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
35int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
36
37
38#if 0
39#define FPGA_DEBUG
40#endif
41
42/* predefine these here for FPGA programming (before including fpga.c) */
43#define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_DONE)
45#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_INIT)
stroese8d8f8942004-12-16 18:24:06 +000046#define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */
47#define out32(a,b) /* nothing to do (gpio already configured) */
48
49
50/* fpga configuration data - generated by bin2cc */
51const unsigned char fpgadata[] =
52{
53#include "fpgadata.c"
54};
55
56/*
57 * include common fpga code (for esd boards)
58 */
59#include "../common/fpga.c"
60
61
62int checkboard (void) {
63 ulong val;
wdenkefe2a4d2004-12-16 21:44:03 +000064 uchar val8;
stroese8d8f8942004-12-16 18:24:06 +000065
66 puts ("Board: ");
67 puts("esd TASREG");
68 val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
69 printf(" (Switch=%1X)\n", val8);
70
71 /*
72 * Set LED on
73 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074 val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
stroese8d8f8942004-12-16 18:24:06 +000075 mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
76
77 return 0;
78};
79
80
Becky Bruce9973e3c2008-06-09 16:03:40 -050081phys_size_t initdram (int board_type) {
stroese8d8f8942004-12-16 18:24:06 +000082 unsigned long junk = 0xa5a59696;
83
84 /*
85 * Note:
86 * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
87 */
88
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089#ifdef CONFIG_SYS_FAST_CLK
stroese8d8f8942004-12-16 18:24:06 +000090 /*
91 * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
92 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
93 */
94 mbar_writeShort(MCFSIM_DCR, 0x8239);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020095#elif CONFIG_SYS_PLL_BYPASS
stroese8d8f8942004-12-16 18:24:06 +000096 /*
97 * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
98 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
99 */
100 mbar_writeShort(MCFSIM_DCR, 0x8202);
101#else
102 /*
103 * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
104 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
105 */
106 mbar_writeShort(MCFSIM_DCR, 0x8222);
107#endif
108
109 /*
110 * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
111 * PM=1 (continuous page mode)
112 */
113
114 /* RE=0 (keep auto-refresh disabled while setting up registers) */
115 mbar_writeLong(MCFSIM_DACR0, 0x00003324);
116
117 /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
118 mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
119
120 /** Precharge sequence **/
121 mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100122 out_be32((void *)0, junk); /* write to a memory location to init. precharge */
stroese8d8f8942004-12-16 18:24:06 +0000123 udelay(0x10); /* Allow several Precharge cycles */
124
125 /** Refresh Sequence **/
126 mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
127 udelay(0x7d0); /* Allow gobs of refresh cycles */
128
129 /** Mode Register initialization **/
130 mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100131 out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */
stroese8d8f8942004-12-16 18:24:06 +0000132
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133 return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
stroese8d8f8942004-12-16 18:24:06 +0000134};
135
136
137int testdram (void) {
138 /* TODO: XXX XXX XXX */
139 printf ("DRAM test not implemented!\n");
140
141 return (0);
142}
143
144
145int misc_init_r (void)
146{
147 unsigned char *dst;
148 ulong len = sizeof(fpgadata);
149 int status;
150 int index;
151 int i;
152 uchar buf[8];
153
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
155 if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
stroese8d8f8942004-12-16 18:24:06 +0000156 printf ("GUNZIP ERROR - must RESET board to recover\n");
157 do_reset (NULL, 0, 0, NULL);
158 }
159
160 status = fpga_boot(dst, len);
161 if (status != 0) {
162 printf("\nFPGA: Booting failed ");
163 switch (status) {
164 case ERROR_FPGA_PRG_INIT_LOW:
165 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
166 break;
167 case ERROR_FPGA_PRG_INIT_HIGH:
168 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
169 break;
170 case ERROR_FPGA_PRG_DONE:
171 printf("(Timeout: DONE not high after programming FPGA)\n ");
172 break;
173 }
174
175 /* display infos on fpgaimage */
176 index = 15;
177 for (i=0; i<4; i++) {
178 len = dst[index];
179 printf("FPGA: %s\n", &(dst[index+1]));
180 index += len+3;
181 }
182 putc ('\n');
183 /* delayed reboot */
184 for (i=20; i>0; i--) {
185 printf("Rebooting in %2d seconds \r",i);
186 for (index=0;index<1000;index++)
187 udelay(1000);
188 }
189 putc ('\n');
190 do_reset(NULL, 0, 0, NULL);
191 }
192
193 puts("FPGA: ");
194
195 /* display infos on fpgaimage */
196 index = 15;
197 for (i=0; i<4; i++) {
198 len = dst[index];
199 printf("%s ", &(dst[index+1]));
200 index += len+3;
201 }
202 putc ('\n');
203
204 free(dst);
205
206 /*
207 *
208 */
209 buf[0] = 0x00;
210 buf[1] = 0x32;
211 buf[2] = 0x3f;
212 i2c_write(0x38, 0, 0, buf, 3);
213
214 return (0);
215}
216
217
218#if 1 /* test-only: board specific test commands */
219int i2c_probe(uchar addr);
220
221/*
222 */
223int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
224{
225 ulong addr;
226
227 if (argc < 2) {
228 puts("ERROR!\n");
229 return -1;
230 }
231
232 addr = simple_strtol (argv[1], NULL, 16);
233
Peter Tyser0f89c542009-04-18 22:34:03 -0500234 printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
stroese8d8f8942004-12-16 18:24:06 +0000235
236 for (;;) {
237 i2c_probe(addr);
238
239 /* Abort if ctrl-c was pressed */
240 if (ctrlc()) {
241 puts("\nAbort\n");
242 return 0;
243 }
244
245 udelay(1000);
246 }
247
248 return 0;
249}
250U_BOOT_CMD(
251 iploop, 2, 1, do_iploop,
Peter Tyser0f89c542009-04-18 22:34:03 -0500252 "i2c probe loop <addr>",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200253 ""
254);
stroese8d8f8942004-12-16 18:24:06 +0000255
256/*
257 */
258int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
259{
260 uchar buf[8];
261
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100262 out_be16((void *)0xe0000000, 0x4000);
stroese8d8f8942004-12-16 18:24:06 +0000263
264 udelay(5000); /* wait for 5ms */
265
266 buf[0] = 0x10;
267 buf[1] = 0x07;
268 buf[2] = 0x03;
269 i2c_write(0x10, 0, 0, buf, 3);
270
271 buf[0] = 0x10;
272 buf[1] = 0x01;
273 buf[2] = 0x80;
274 i2c_write(0x10, 0, 0, buf, 3);
275
276 buf[0] = 0x10;
277 buf[1] = 0x02;
278 buf[2] = 0x03;
279 i2c_write(0x10, 0, 0, buf, 3);
280
281 buf[0] = 0x10;
282 buf[1] = 0x03;
283 buf[2] = 0x29;
284 i2c_write(0x10, 0, 0, buf, 3);
285
286 buf[0] = 0x10;
287 buf[1] = 0x04;
288 buf[2] = 0x00;
289 i2c_write(0x10, 0, 0, buf, 3);
290
291 buf[0] = 0x10;
292 buf[1] = 0x05;
293 buf[2] = 0x00;
294 i2c_write(0x10, 0, 0, buf, 3);
295
296 buf[0] = 0x10;
297 buf[1] = 0x07;
298 buf[2] = 0x02;
299 i2c_write(0x10, 0, 0, buf, 3);
300
301 return 0;
302}
303U_BOOT_CMD(
304 codec, 1, 1, do_codec,
Peter Tyser2fb26042009-01-27 18:03:12 -0600305 "Enable codec",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200306 ""
307);
stroese8d8f8942004-12-16 18:24:06 +0000308
309/*
310 */
311int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
312{
313 ulong addr;
314 ulong instr;
315 ulong cntrl;
316 ulong data;
317 uchar buf[8];
318
319 if (argc < 5) {
320 puts("ERROR!\n");
321 return -1;
322 }
323
324 addr = simple_strtol (argv[1], NULL, 16);
325 instr = simple_strtol (argv[2], NULL, 16);
326 cntrl = simple_strtol (argv[3], NULL, 16);
327 data = simple_strtol (argv[4], NULL, 16);
328
329 buf[0] = (uchar)instr;
330 buf[1] = (uchar)cntrl;
331 buf[2] = (uchar)data;
332 i2c_write(addr, 0, 0, buf, 3);
333
334 return 0;
335}
336U_BOOT_CMD(
337 saa, 5, 1, do_saa,
Peter Tyser2fb26042009-01-27 18:03:12 -0600338 "Write to SAA1064 <addr> <instr> <cntrl> <data>",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200339 ""
340);
stroese8d8f8942004-12-16 18:24:06 +0000341
342/*
343 */
344int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
345{
346 ulong addr;
347 ulong data0;
348 ulong data1;
349 ulong data2;
350 ulong data3;
351 uchar buf[8];
352 int cnt;
353
354 if (argc < 3) {
355 puts("ERROR!\n");
356 return -1;
357 }
358
359 addr = simple_strtol (argv[1], NULL, 16);
360 cnt = simple_strtol (argv[2], NULL, 16);
361 data0 = simple_strtol (argv[3], NULL, 16);
362 data1 = simple_strtol (argv[4], NULL, 16);
363 data2 = simple_strtol (argv[5], NULL, 16);
364 data3 = simple_strtol (argv[6], NULL, 16);
365
366 printf("Writing %d bytes to device %lx!\n", cnt, addr);
367 buf[0] = (uchar)data0;
368 buf[1] = (uchar)data1;
369 buf[2] = (uchar)data2;
370 buf[3] = (uchar)data3;
371 i2c_write(addr, 0, 0, buf, cnt);
372
373 return 0;
374}
375U_BOOT_CMD(
376 iwrite, 6, 1, do_iwrite,
Peter Tyser2fb26042009-01-27 18:03:12 -0600377 "Write n bytes to I2C-device",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200378 "addr cnt data0 ... datan"
379);
stroese8d8f8942004-12-16 18:24:06 +0000380
381/*
382 */
383int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
384{
385 ulong addr;
386 ulong cnt;
387 uchar buf[32];
388 int i;
389
390 if (argc < 3) {
391 puts("ERROR!\n");
392 return -1;
393 }
394
395 addr = simple_strtol (argv[1], NULL, 16);
396 cnt = simple_strtol (argv[2], NULL, 16);
397
398 i2c_read(addr, 0, 0, buf, cnt);
399 printf("I2C Data:");
400 for (i=0; i<cnt; i++) {
401 printf(" %02X", buf[i]);
402 }
403 printf("\n");
404
405 return 0;
406}
407U_BOOT_CMD(
408 iread, 3, 1, do_iread,
Peter Tyser2fb26042009-01-27 18:03:12 -0600409 "Read from I2C <addr> <cnt>",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200410 ""
411);
stroese8d8f8942004-12-16 18:24:06 +0000412
413/*
414 */
415int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
416{
417 ulong addr;
418 uchar buf[32];
419 int cnt;
420
421 if (argc < 2) {
422 puts("ERROR!\n");
423 return -1;
424 }
425
426 addr = simple_strtol (argv[1], NULL, 16);
427 cnt = 1;
428
429 printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
430
431 for (;;) {
432 i2c_read(addr, 0, 0, buf, cnt);
433
434 /* Abort if ctrl-c was pressed */
435 if (ctrlc()) {
436 puts("\nAbort\n");
437 return 0;
438 }
439
440 udelay(3000);
441 }
442
443 return 0;
444}
445U_BOOT_CMD(
446 ireadl, 2, 1, do_ireadl,
Peter Tyser2fb26042009-01-27 18:03:12 -0600447 "Read-loop from I2C <addr>",
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200448 ""
449);
stroese8d8f8942004-12-16 18:24:06 +0000450#endif