Gabriel Huau | 5318f18 | 2015-05-25 22:27:37 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This header provides constants for binding intel,x86-pinctrl. |
| 3 | */ |
| 4 | |
| 5 | #ifndef _DT_BINDINGS_GPIO_X86_GPIO_H |
| 6 | #define _DT_BINDINGS_GPIO_X86_GPIO_H |
| 7 | |
| 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | |
| 10 | #define GPIO_MODE_NATIVE 0 |
| 11 | #define GPIO_MODE_GPIO 1 |
| 12 | |
| 13 | #define GPIO_MODE_FUNC0 0 |
| 14 | #define GPIO_MODE_FUNC1 1 |
| 15 | #define GPIO_MODE_FUNC2 2 |
| 16 | #define GPIO_MODE_FUNC3 3 |
| 17 | #define GPIO_MODE_FUNC4 4 |
| 18 | #define GPIO_MODE_FUNC5 5 |
| 19 | #define GPIO_MODE_FUNC6 6 |
| 20 | |
| 21 | #define PIN_INPUT 0 |
| 22 | #define PIN_OUTPUT 1 |
| 23 | |
| 24 | #define PIN_INPUT_NOPULL 0 |
| 25 | #define PIN_INPUT_PULLUP 1 |
| 26 | #define PIN_INPUT_PULLDOWN 2 |
| 27 | |
| 28 | #define PULL_STR_2K 0 |
| 29 | #define PULL_STR_20K 2 |
| 30 | |
Simon Glass | b24f5c4 | 2016-03-11 22:07:20 -0700 | [diff] [blame] | 31 | #define ROUTE_SCI 0 |
| 32 | #define ROUTE_SMI 1 |
| 33 | |
| 34 | #define OWNER_ACPI 0 |
| 35 | #define OWNER_GPIO 1 |
| 36 | |
| 37 | #define PIRQ_APIC_MASK 0 |
| 38 | #define PIRQ_APIC_ROUTE 1 |
| 39 | |
| 40 | #define TRIGGER_EDGE 0 |
| 41 | #define TRIGGER_LEVEL 1 |
| 42 | |
Gabriel Huau | 5318f18 | 2015-05-25 22:27:37 -0700 | [diff] [blame] | 43 | #endif |