blob: 479567510507c30513c8119642be2b83555be32e [file] [log] [blame]
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010012#define CONFIG_SYS_MONITOR_LEN SZ_512K
13#define CONFIG_SYS_UBOOT_BASE \
14 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15
16#ifdef CONFIG_SPL_BUILD
17/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010018#define CONFIG_SPL_STACK 0x960000
19#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010020#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
22
23/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
24#define CONFIG_MALLOC_F_ADDR 0x184000
25/* For RAW image gives a error info not panic */
26#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
27
28#define CONFIG_POWER_PCA9450
29
30#define CONFIG_SYS_I2C
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010031#endif /* CONFIG_SPL_BUILD */
32
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010033/* ENET Config */
34/* ENET1 */
35#if defined(CONFIG_CMD_NET)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010036#define CONFIG_FEC_MXC_PHYADDR 7
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010037
38#define PHY_ANEG_TIMEOUT 20000
39#endif /* CONFIG_CMD_NET */
40
41#define MEM_LAYOUT_ENV_SETTINGS \
42 "fdt_addr_r=0x43000000\0" \
43 "kernel_addr_r=0x40000000\0" \
44 "ramdisk_addr_r=0x46400000\0" \
45 "scriptaddr=0x46000000\0"
46
47/* Enable Distro Boot */
48#ifndef CONFIG_SPL_BUILD
49#define BOOT_TARGET_DEVICES(func) \
50 func(MMC, mmc, 1) \
51 func(MMC, mmc, 2) \
52 func(DHCP, dhcp, na)
53#include <config_distro_bootcmd.h>
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010054#else
55#define BOOTENV
56#endif
57
58#if defined(CONFIG_TDX_EASY_INSTALLER)
59# define BOOT_SCRIPT "boot-tezi.scr"
60#else
61# define BOOT_SCRIPT "boot.scr"
62#endif
63
64/* Initial environment variables */
65#define CONFIG_EXTRA_ENV_SETTINGS \
66 BOOTENV \
67 MEM_LAYOUT_ENV_SETTINGS \
68 "bootcmd_mfg=fastboot 0\0" \
69 "boot_file=Image\0" \
70 "boot_scripts=" BOOT_SCRIPT "\0" \
71 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
72 "console=ttymxc2\0" \
73 "fdt_board=dev\0" \
74 "initrd_addr=0x43800000\0" \
75 "initrd_high=0xffffffffffffffff\0" \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010076 "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
77 "consoleblank=0 earlycon\0" \
78 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
79 "if test \"$confirm\" = \"y\"; then " \
80 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
81 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
82 "${blkcnt}; fi\0"
83
84#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
85#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
86#define CONFIG_SYS_INIT_SP_OFFSET \
87 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
88#define CONFIG_SYS_INIT_SP_ADDR \
89 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
90
91#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
92
93/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
94#define CONFIG_SYS_SDRAM_BASE 0x40000000
95#define PHYS_SDRAM 0x40000000
96#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
97#define PHYS_SDRAM_2 0x100000000
98#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
99
100/* UART */
Marek Vasut52b6b482022-04-24 23:44:03 +0200101#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +0100102
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +0100103#endif /* __VERDIN_IMX8MP_H */