blob: 82fe796f4b8cb5c0a411e082da7949348f595d01 [file] [log] [blame]
Madalin Bucurd86ab1b2020-04-23 16:25:11 +03001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * QorIQ FMan v3 device tree
4 *
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
6 * Copyright 2020 NXP
7 *
8 */
9
10fman0: fman@1a00000 {
11 #address-cells = <1>;
12 #size-cells = <1>;
13 cell-index = <0>;
14 compatible = "fsl,fman";
15 ranges = <0x0 0x0 0x1a00000 0xfe000>;
16 reg = <0x0 0x1a00000 0x0 0xfe000>;
17 clocks = <&clockgen 3 0>;
18 clock-names = "fmanclk";
19 fsl,qman-channel-range = <0x800 0x10>;
20 ptimer-handle = <&ptp_timer0>;
21
22 muram@0 {
23 compatible = "fsl,fman-muram";
24 reg = <0x0 0x60000>;
25 };
26
27 fman0_oh_0x2: port@82000 {
28 cell-index = <0x2>;
29 compatible = "fsl,fman-v3-port-oh";
30 reg = <0x82000 0x1000>;
31 };
32
33 fman0_oh_0x3: port@83000 {
34 cell-index = <0x3>;
35 compatible = "fsl,fman-v3-port-oh";
36 reg = <0x83000 0x1000>;
37 };
38
39 fman0_oh_0x4: port@84000 {
40 cell-index = <0x4>;
41 compatible = "fsl,fman-v3-port-oh";
42 reg = <0x84000 0x1000>;
43 };
44
45 fman0_oh_0x5: port@85000 {
46 cell-index = <0x5>;
47 compatible = "fsl,fman-v3-port-oh";
48 reg = <0x85000 0x1000>;
49 };
50
51 fman0_oh_0x6: port@86000 {
52 cell-index = <0x6>;
53 compatible = "fsl,fman-v3-port-oh";
54 reg = <0x86000 0x1000>;
55 };
56
57 fman0_oh_0x7: port@87000 {
58 cell-index = <0x7>;
59 compatible = "fsl,fman-v3-port-oh";
60 reg = <0x87000 0x1000>;
61 };
62
63 mdio0: mdio@fc000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
67 reg = <0xfc000 0x1000>;
68 };
69
70 xmdio0: mdio@fd000 {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
74 reg = <0xfd000 0x1000>;
75 };
76};
77
78ptp_timer0: ptp-timer@1afe000 {
79 compatible = "fsl,fman-ptp-timer";
80 reg = <0x0 0x1afe000 0x0 0x1000>;
81 clocks = <&clockgen 3 0>;
82};